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    ELECTRONIC DEVICES INCLUDING OXIDE DIELECTRIC AND INTERFACE LAYERS
    15.
    发明申请
    ELECTRONIC DEVICES INCLUDING OXIDE DIELECTRIC AND INTERFACE LAYERS 审中-公开
    包括氧化物介质和界面层的电子器件

    公开(公告)号：US20140327062A1

    公开(公告)日：2014-11-06

    申请号：US14073354

    申请日：2013-11-06

    申请人： Ki-Yeon PARK ,  Hyun-Jun Kim ,  Se-Hyoung Ahn ,  Young-Geun Park ,  Ki-Vin Im

    发明人： Ki-Yeon PARK ,  Hyun-Jun Kim ,  Se-Hyoung Ahn ,  Young-Geun Park ,  Ki-Vin Im

    IPC分类号： H01L49/02 ,  H01L27/108

    CPC分类号： H01L28/60 ,  H01L27/10808 ,  H01L27/1085 ,  H01L28/40 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/517

    摘要： An electronic device may include a substrate, an oxide dielectric layer on the substrate, an interface layer on the oxide dielectric layer, and an electrode on the interface layer. The oxide dielectric layer may include an aluminum oxide layer between first and second zirconium oxide layers. The interface layer may have a first formation enthalpy, and the oxide dielectric layer may be between the substrate and the interface layer. The electrode may have a second formation enthalpy higher than the first formation enthalpy, and the interface layer may be between the oxide dielectric layer and the electrode.

    摘要翻译： 电子器件可以包括衬底，衬底上的氧化物介电层，氧化物介电层上的界面层和界面层上的电极。 氧化物介电层可以包括在第一和第二氧化锆层之间的氧化铝层。 界面层可以具有第一形成焓，并且氧化物介电层可以在衬底和界面层之间。 电极可具有比第一形成焓高的第二形成焓，并且界面层可以在氧化物介电层和电极之间。

    Methods of manufacturing semiconductor devices having self-aligned contact pads
    19.
    发明授权
    Methods of manufacturing semiconductor devices having self-aligned contact pads 有权
    制造具有自对准接触焊盘的半导体器件的方法

    公开(公告)号：US09184227B1

    公开(公告)日：2015-11-10

    申请号：US14529500

    申请日：2014-10-31

    申请人： Young-Kuk Kim ,  Ki-Vin Im ,  Han-Jin Lim ,  In-Seak Hwang

    发明人： Young-Kuk Kim ,  Ki-Vin Im ,  Han-Jin Lim ,  In-Seak Hwang

    IPC分类号： H01L21/336 ,  H01L49/02 ,  H01L21/8234

    CPC分类号： H01L27/10823 ,  H01L21/823437 ,  H01L21/823475 ,  H01L27/10808 ,  H01L27/10855 ,  H01L27/10885 ,  H01L28/60 ,  H01L29/4236 ,  H01L29/42364 ,  H01L29/7827

    摘要： A semiconductor device includes a substrate having a field area that defines active areas, gate trenches in the substrate and extending in a first direction, a buried gate in a respective gate trench, gate capping fences in a respective gate trench over a respective buried gate, the gate capping fences protruding from top surfaces of the active areas and extending in the first direction, bit line trenches in the gate capping fences, a respective bit line trench crossing the gate capping fences and extending in a second direction perpendicular to the first direction, an insulator structure on inner walls of a respective bit line trench, bit lines and bit line capping patterns stacked on the insulator structures in a respective bit line trench, contact pads self-aligned with the gate capping fences and on the substrate between the adjacent bit lines, and a lower electrode of a capacitor on a respective contact pad.

    摘要翻译： 半导体器件包括具有限定有源区域的场区域的衬底，衬底中的栅极沟槽和沿第一方向延伸的衬底，相应栅极沟槽中的掩埋栅极，在相应的掩埋栅极上的相应栅极沟槽中的栅极栅极栅极， 所述栅极覆盖栅栏从所述有源区域的顶表面突出并且沿所述第一方向延伸，所述栅极覆盖栅栏中的位线沟槽跨过所述栅极覆盖栅栏并沿垂直于所述第一方向的第二方向延伸的相应位线沟槽， 相应位线沟槽的内壁上的绝缘体结构，堆叠在相应位线沟槽中的绝缘体结构上的位线和位线封接图案，与栅极覆盖栅栏自对准的接触焊盘和相邻位之间的衬底上的绝缘体结构 线路和相应接触焊盘上的电容器的下电极。