公开(公告)号：US20140346666A1

公开(公告)日：2014-11-27

申请号：US14019548

申请日：2013-09-06

Applicant: Industrial Technology Research Institute

Inventor： Shang-Chun Chen ,  Cha-Hsin Lin ,  Tzu-Kun Ku

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/145 ,  H01L23/49827 ,  H01L24/81 ,  H01L25/065 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor device and a manufacturing method thereof are provided. The manufacturing method includes following steps. A mould is provided. The mould has a chamber and a plurality of protrusions in the chamber. A thermosetting material is injected into the chamber. The thermosetting material is cured. A parting step is performed to separate the cured thermosetting material from the mould, so as to form an interposer substrate. A plurality of blind holes corresponding to the protrusions is formed on the interposer substrate. A conductive material is filled into the blind holes to form a plurality of conductive pillars. A conductive pattern layer is formed on a surface of the interposer substrate. The conductive pattern layer is electrically connected with the conductive pillars.

Abstract translation: 提供了一种半导体器件及其制造方法。 制造方法包括以下步骤。 提供模具。 模具在腔室中具有腔室和多个突起。 将热固性材料注入室中。 热固性材料固化。 执行分离步骤以将固化的热固性材料与模具分离，以形成插入物基板。 在内插基板上形成有与突起对应的多个盲孔。 将导电材料填充到盲孔中以形成多个导电柱。 导电图案层形成在中介层基板的表面上。 导电图案层与导电柱电连接。

公开(公告)号：US10976488B1

公开(公告)日：2021-04-13

申请号：US16809536

申请日：2020-03-04

Applicant: Industrial Technology Research Institute

Inventor： Wei-Yen Chen ,  Sin-Jhu Wun ,  Shang-Chun Chen

IPC: G02B6/12 ,  G02B6/42 ,  G02B6/14

Abstract: A silicon photonic package structure including a substrate, a conductive bump, an obstacle structure, a laser diode, a mode converter, and a ball lens is provided. The conductive bump is disposed on the substrate. The obstacle structure is formed on the substrate. The laser diode is disposed above the substrate and electrically bonded to the conductive bump. A surface of the laser diode facing the substrate has a ridge. An end of the ridge has a light-emitting surface. The obstacle structure is located between the conductive bump and the ridge. A thickness of the obstacle structure in a direction perpendicular to the surface of the substrate is greater than a thickness of the ridge in the direction perpendicular to the surface of the substrate. The mode converter is formed on the substrate. The ball lens is formed on the substrate and located between the light-emitting surface and a light input end of the mode converter.

公开(公告)号：US20210102866A1

公开(公告)日：2021-04-08

申请号：US16702564

申请日：2019-12-04

Applicant: Industrial Technology Research Institute

Inventor： Sin-Jhu Wun ,  Shang-Chun Chen

IPC: G01M11/00 ,  G02B6/42

Abstract: A test device configured to test a photonic integrated circuit (IC) is provided. The photonic IC includes at least one waveguide edge coupler, and the test device includes an optical coupler. The optical coupler is configured to be optically aligned with the photonic IC, and includes at least one focusing lens and a first reflector. The at least one focusing lens is aligned with the at least one waveguide edge coupler. A light from the waveguide edge coupler is focused by the focusing lens, reflected by the first reflector, and transmitted to a fiber connector in sequence, or a light from the fiber connector is reflected by the first reflector and focused onto the waveguide edge coupler by the focusing lens in sequence. A heterogeneously integrated structure is also provided.

公开(公告)号：US20170031102A1

公开(公告)日：2017-02-02

申请号：US15222956

申请日：2016-07-29

Applicant: Industrial Technology Research Institute

Inventor： Kai-Ning Ku ,  Chih-Lin Wang ,  Shang-Chun Chen

IPC: G02B6/30 ,  H01S5/12 ,  H01S5/042 ,  G02B6/12

CPC classification number: G02B6/34 ,  G01J1/0209 ,  G01J1/0407 ,  G01J1/0422 ,  G02B6/12004 ,  G02B6/305 ,  G02B6/4206 ,  G02B6/4214 ,  G02B6/4298 ,  G02B2006/12121 ,  G02B2006/12147 ,  H01S5/0425 ,  H01S5/12 ,  H04B10/079 ,  H05K3/30 ,  H05K2203/0147 ,  H05K2203/163

Abstract: An optical component optically coupled to an optical fiber includes a substrate and an edge-emitting laser. The substrate includes an accommodating cavity, a plurality of openings, a waveguide, an optical coupler and a plurality of pads. The waveguide and the optical coupler are distributed outside the accommodating cavity. The openings are distributed at the bottom surface of the accommodating cavity and the pads are located at the bottom of the openings. The optical coupler is optically coupled to an end of the waveguide and includes a light-incident surface. The edge-emitting laser is embedded in the accommodating cavity and includes a light-emitting layer and a plurality of bumps located in the openings and electrically connected to the pads. The ratio of the level height difference between the light-emitting layer and the optical coupler to the thickness of the optical coupler ranges from 0 to 0.5.

Abstract translation: 光耦合到光纤的光学部件包括基板和边缘发射激光器。 衬底包括容纳腔，多个开口，波导，光耦合器和多个衬垫。 波导和光耦合器分布在容纳腔的外部。 开口分布在容纳腔的底表面处，并且垫位于开口的底部。 光耦合器光耦合到波导的端部并且包括光入射表面。 边缘发射激光器嵌入在容纳腔中，并且包括发光层和位于开口中并电连接到焊盘的多个凸起。 发光层和光耦合器之间的高度差与光耦合器的厚度之比在0至0.5之间。

公开(公告)号：US20150294953A1

公开(公告)日：2015-10-15

申请号：US14749644

申请日：2015-06-25

Applicant: Industrial Technology Research Institute

Inventor： Shang-Chun Chen ,  Cha-Hsin Lin ,  Tzu-Kun Ku

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/56 ,  H01L25/065 ,  H01L21/683 ,  H01L21/78 ,  H01L25/00 ,  H01L21/768 ,  H01L21/48

CPC classification number: H01L24/97 ,  H01L21/02304 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/145 ,  H01L23/3107 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/19 ,  H01L24/81 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/06182 ,  H01L2224/12105 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/19 ,  H01L2224/03 ,  H01L2224/11

Abstract: A manufacturing method of a semiconductor device is provided. First, a mould is provided. The mould has a chamber, patterns in the chamber, and protrusions in the chamber. A carrier substrate having at least one die located thereon is disposed in the chamber, and the protrusions surround the die. A thermosetting material is injected into the chamber and is cured. The cured thermosetting material is separated from the mould, so as to form an interposer substrate. A plurality of through holes corresponding to the protrusions and a plurality of grooves corresponding to the patterns are formed on the interposer substrate. A conductive material is filled into the through holes and the grooves to form a plurality of conductive pillars and a first conductive pattern layer on a first surface of the interposer substrate. The first conductive pattern layer is electrically connected with the conductive pillars.

Abstract translation: 提供一种半导体器件的制造方法。 首先，提供模具。 模具具有腔室，腔室中的图案和腔室中的突起。 具有位于其上的至少一个管芯的载体衬底设置在腔室中，并且突出部围绕模具。 将热固性材料注入室中并固化。 将固化的热固性材料与模具分离，以形成插入物基板。 对应于突起的多个通孔和对应于图案的多个槽形成在插入器基板上。 将导电材料填充到通孔和沟槽中以在内插器基板的第一表面上形成多个导电柱和第一导电图案层。 第一导电图案层与导电柱电连接。

公开(公告)号：US09041163B2

公开(公告)日：2015-05-26

申请号：US14033524

申请日：2013-09-23

Applicant: Industrial Technology Research Institute

Inventor： Shang-Chun Chen ,  Cha-Hsin Lin ,  Yu-Chen Hsin

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/3065 ,  H01L21/30655 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a device layer and a least one conductive post. The substrate includes a first surface, a second surface opposite to the first surface, and at least one through hole penetrating the substrate. The substrate includes a first side wall portion and a second side wall portion at the through hole. The first side wall portion is connected to the first surface and includes a plurality of first scallops. The second side wall portion is connected to the second surface and includes a non-scalloped surface. The device layer is disposed on the second surface, and the second side wall portion of the substrate further extends into the device layer along the non-scalloped surface. The conductive post is disposed in the through hole, wherein the conductive post is electrically connected to the device layer.

Abstract translation: 提供半导体结构及其制造方法。 半导体结构包括衬底，器件层和至少一个导电柱。 衬底包括第一表面，与第一表面相对的第二表面和穿透衬底的至少一个通孔。 基板包括在通孔处的第一侧壁部分和第二侧壁部分。 第一侧壁部分连接到第一表面并且包括多个第一扇贝。 第二侧壁部分连接到第二表面并且包括非扇形表面。 器件层设置在第二表面上，并且衬底的第二侧壁部分还沿着非扇形表面延伸到器件层中。 导电柱设置在通孔中，其中导电柱电连接到器件层。