SEMICONDUCTOR PACKAGE STRUCTURE INCLUDING ANTENNA

    公开(公告)号:US20230056550A1

    公开(公告)日:2023-02-23

    申请号:US18046218

    申请日:2022-10-13

    Applicant: MEDIATEK INC.

    Abstract: An electronic device that has an antenna device that includes a conductive pattern layer comprising a first antenna element, the conductive pattern layer formed in an insulating substrate and adjacent to a first surface of the insulating substrate, and a second antenna element formed on a second surface of the insulating substrate opposite the first surface. The electronic device further has a semiconductor package that includes a redistribution layer (RDL) structure bonded and electrically connected to the conductive pattern layer, a first electronic component electrically connected to the RDL structure, and an encapsulating layer formed on the RDL structure and surrounding the first electronic component.

    SEMICONDUCTOR PACKAGE STRUCTURE
    13.
    发明申请

    公开(公告)号:US20220336374A1

    公开(公告)日:2022-10-20

    申请号:US17810625

    申请日:2022-07-04

    Applicant: MEDIATEK INC.

    Abstract: A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. A hole is formed on a surface of the substrate, wherein the hole is located within projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material, surrounding the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate, are exposed by the molding material.

    CHIP SCALE PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20200312732A1

    公开(公告)日:2020-10-01

    申请号:US16903458

    申请日:2020-06-17

    Applicant: MEDIATEK INC.

    Abstract: A semiconductor package structure includes a semiconductor die, a redistribution layer (RDL) structure, a protective insulating layer, and a conductive structure. The semiconductor die has a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. The RDL structure is on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. The protective insulating layer covers the RDL structure, the second surface and the third surface of the semiconductor die. The conductive structure passes through the protective insulating layer and is electrically coupled to the RDL structure.

    SEMICONDUCTOR PACKAGE ASSEMBLY
    15.
    发明申请

    公开(公告)号:US20190131233A1

    公开(公告)日:2019-05-02

    申请号:US16232129

    申请日:2018-12-26

    Applicant: MEDIATEK INC.

    Abstract: A semiconductor package assembly includes a redistribution layer (RDL) structure, which RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace, and the RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The RDL structure includes a first region for a semiconductor die to be disposed thereon and a second region surrounding the first region, and the extended wing portion of the RDL contact pad is offset from a center of the first region.

    SEMICONDUCTOR PACKAGE STRUCTURE
    16.
    发明申请

    公开(公告)号:US20180269164A1

    公开(公告)日:2018-09-20

    申请号:US15906098

    申请日:2018-02-27

    Applicant: MEDIATEK INC.

    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto. The substrate includes a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are separated by a molding material. In addition, the semiconductor package structure includes a first hole and a second hole formed on the second surface of the substrate.

    SEMICONDUCTOR PACKAGE ASSEMBLY
    17.
    发明申请

    公开(公告)号:US20170141041A1

    公开(公告)日:2017-05-18

    申请号:US15338652

    申请日:2016-10-31

    Applicant: MEDIATEK INC.

    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a redistribution layer (RDL) structure having a first surface and a second surface opposite to the first substrate. The RDL structure includes a redistribution layer (RDL) contact pad arranged close to the second surface. A passivation layer is disposed on the RDL contact pad. The passivation layer has an opening corresponding to the RDL contact pad such that the RDL contact pad is exposed to the opening. A first distance between a first position of the opening and a central point of the opening is different from a second distance between a second position of the opening and the central point of the opening in a plan view.

    SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20240178112A1

    公开(公告)日:2024-05-30

    申请号:US18388275

    申请日:2023-11-09

    Applicant: MEDIATEK INC.

    Abstract: A semiconductor package structure includes a semiconductor substrate, a conductive pad on the semiconductor substrate, and a passivation layer on the semiconductor substrate and the conductive pad. The passivation layer exposes a portion of the top surface of the conductive pad. The semiconductor package structure also includes a conductive adhesive layer on the conductive pad, and a dielectric layer on the passivation layer and the conductive adhesive layer. The dielectric layer exposes a portion of the conductive adhesive layer. The semiconductor package structure also includes a redistribution layer (RDL) structure on the dielectric layer and electrically connected to the conductive pad through the conductive adhesive layer. The semiconductor package structure also includes a bump structure over the RDL structure.

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