公开(公告)号：US09105666B2

公开(公告)日：2015-08-11

申请号：US14494175

申请日：2014-09-23

Applicant: Micron Technology, Inc.

Inventor： Jeffery B. Hull ,  John M. Meldrim

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/02 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/788 ,  H01L27/115

CPC classification number: H01L29/66825 ,  H01L21/02178 ,  H01L21/28035 ,  H01L21/31111 ,  H01L27/11556 ,  H01L29/401 ,  H01L29/42324 ,  H01L29/4916 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7889

Abstract: Semiconductor structures including an etch stop material between a substrate and a stack of alternating insulating materials and first conductive materials, wherein the etch stop material comprises an amorphous aluminum oxide on the substrate and a crystalline aluminum oxide on the amorphous aluminum oxide; a channel material extending through the stack; and a second conductive material between the channel material and at least one of the first conductive materials in the stack of alternating insulating materials and first conductive materials, wherein the second conductive material is not between the channel material and the etch stop material. Also disclosed are methods of fabricating such semiconductor structures.

Abstract translation: 半导体结构包括在衬底和交替绝缘材料和第一导电材料的堆叠之间的蚀刻停止材料，其中所述蚀刻停止材料包括在所述衬底上的无定形氧化铝和所述非晶态氧化铝上的结晶氧化铝; 延伸穿过堆叠的通道材料; 以及在所述沟道材料和交替绝缘材料和第一导电材料的堆叠中的所述第一导电材料中的至少一个之间的第二导电材料，其中所述第二导电材料不在所述沟道材料和所述蚀刻停止材料之间。 还公开了制造这种半导体结构的方法。

公开(公告)号：US20230387229A1

公开(公告)日：2023-11-30

申请号：US17804530

申请日：2022-05-27

Applicant: Micron Technology, Inc.

Inventor： Everett A. McTeer ,  Farrell M. Good ,  John M. Meldrim ,  Jordan D. Greenlee ,  Justin D. Shepherdson ,  Naiming Liu ,  Yifen Liu

IPC: H01L29/423 ,  H01L21/28 ,  H01L27/11582

CPC classification number: H01L29/4234 ,  H01L29/40117 ,  H01L27/11582

Abstract: A microelectronic device comprises conductive structures and insulative structures vertically alternating with the conductive structures. At least one of the insulative structures includes interfacial regions extending inward from vertical boundaries of the at least one of the insulative structures, and central region vertically interposed between the interfacial regions. The interfacial regions are doped with one or more of carbon and boron. The insulative structures comprise a lower concentration of the one or more of carbon and boron than the interfacial regions. Additional microelectronic devices, electronic systems, and methods are also described.

公开(公告)号：US10957855B2

公开(公告)日：2021-03-23

申请号：US16039769

申请日：2018-07-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L45/00 ,  H01L27/24

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions.

公开(公告)号：US10217936B2

公开(公告)日：2019-02-26

申请号：US16040521

申请日：2018-07-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L45/00 ,  H01L27/24

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions.

公开(公告)号：US20180351097A1

公开(公告)日：2018-12-06

申请号：US16039769

申请日：2018-07-19

Applicant: Micron Technology, Inc.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions.

公开(公告)号：US20180331285A1

公开(公告)日：2018-11-15

申请号：US16040515

申请日：2018-07-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, a second electrode portion is coupled to the second chalcogenide structure, and a third electrode portion is between the first and second electrode portions. A first portion of an electrically conductive barrier material is disposed between the first and third electrode portions. A second portion of the electrically conductive barrier material is disposed between the second and third electrode portions.

公开(公告)号：US09166158B2

公开(公告)日：2015-10-20

申请号：US13776485

申请日：2013-02-25

Applicant: Micron Technology, Inc.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions.

Abstract translation: 公开了具有导电阻挡材料的相变存储单元电极的制造方法和制造方法。 在一个实例中，装置包括与第一硫族化物结构堆叠在一起的第一硫族化物结构和第二硫族化物结构。 第一电极部分耦合到第一硫族化物结构，并且第二电极部分耦合到第二硫族化物结构。 导电阻挡材料设置在第一和第二电极部分之间。

公开(公告)号：US20140239245A1

公开(公告)日：2014-08-28

申请号：US13776485

申请日：2013-02-25

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144

Abstract: Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions.

Abstract translation: 公开了具有导电阻挡材料的相变存储单元电极的制造方法和制造方法。 在一个实例中，装置包括与第一硫族化物结构堆叠在一起的第一硫族化物结构和第二硫族化物结构。 第一电极部分耦合到第一硫族化物结构，并且第二电极部分耦合到第二硫族化物结构。 导电阻挡材料设置在第一和第二电极部分之间。

公开(公告)号：US11710710B2

公开(公告)日：2023-07-25

申请号：US17443616

申请日：2021-07-27

Applicant: Micron Technology, Inc.

Inventor： Jivaan Kishore Jhothiraman ,  John M. Meldrim ,  Lifang Xu

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/535 ,  H01L21/768 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC classification number: H01L23/562 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/535 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H01L2221/1063

Abstract: Microelectronic devices include a stack structure of insulative structures vertically alternating with conductive structures and arranged in tiers forming opposing staircase structures. A polysilicon fill material substantially fills an opening (e.g., a high-aspect-ratio opening) between the opposing staircase structures. The polysilicon fill material may have non-compressive stress such that the stack structure may be partitioned into blocks without the blocks bending and without contacts—formed in at least one of the polysilicon fill material and the stack structure—deforming, misaligning, or forming electrical shorts with neighboring contacts.

公开(公告)号：US11088088B2

公开(公告)日：2021-08-10

申请号：US16674644

申请日：2019-11-05

Applicant: Micron Technology, Inc.

Inventor： Jivaan Kishore Jhothiraman ,  John M. Meldrim ,  Lifang Xu

IPC: H01L23/00 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11573 ,  H01L23/522 ,  H01L23/528 ,  H01L23/535 ,  H01L21/768 ,  H01L27/11524

Abstract: Microelectronic devices include a stack structure of insulative structures vertically alternating with conductive structures and arranged in tiers forming opposing staircase structures. A polysilicon fill material substantially fills an opening (e.g., a high-aspect-ratio opening) between the opposing staircase structures. The polysilicon fill material may have non-compressive stress such that the stack structure may be partitioned into blocks without the blocks bending and without contacts—formed in at least one of the polysilicon fill material and the stack structure—deforming, misaligning, or forming electrical shorts with neighboring contacts.