公开(公告)号：US08999763B2

公开(公告)日：2015-04-07

申请号：US14300130

申请日：2014-06-09

Applicant: Micron Technology, Inc.

Inventor： Steven Eskildsen ,  Aravind Ramamoorthy

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00

CPC classification number: H01L21/561 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49531 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.

Abstract translation: 实施例包括但不限于包括半导体封装的设备和系统。 具有包括至少一个拓扑特征（例如插入件的表面中的凹陷）的插入件的存储器封装，耦合到插入件的表面的管芯，以及形成在管芯和插入件上的密封剂材料，并且设置在 至少一个凹陷以抵抗密封材料相对于插入件的移动。 可以描述和要求保护其他实施例。

公开(公告)号：US20140287558A1

公开(公告)日：2014-09-25

申请号：US14300130

申请日：2014-06-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Steven Eskildsen ,  Aravind Ramamoorthy

IPC: H01L21/56 ,  H01L23/00

CPC classification number: H01L21/561 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49531 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.

Abstract translation: 实施例包括但不限于包括半导体封装的设备和系统。 具有包括至少一个拓扑特征（例如插入件的表面中的凹陷）的插入件的存储器封装，耦合到插入件的表面的管芯，以及形成在管芯和插入件上的密封剂材料，并且设置在 至少一个凹陷以抵抗密封材料相对于插入件的移动。 可以描述和要求保护其他实施例。

公开(公告)号：US20140009218A1

公开(公告)日：2014-01-09

申请号：US14021268

申请日：2013-09-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Mostafa Naguib Abdulla ,  Steven Eskildsen

IPC: H01L27/02

CPC classification number: H01L27/0214 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85399

Abstract: Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond pads on an integrated circuit die may be connected together via one or more electrically conductive interconnects.

Abstract translation: 本文公开的实施例可以涉及用于集成电路器件的电源电压或接地连接。 作为一个示例，集成电路管芯上的两个或更多个电源电压接合焊盘可以经由一个或多个导电互连件连接在一起。

公开(公告)号：US20210117115A1

公开(公告)日：2021-04-22

申请号：US17135476

申请日：2020-12-28

Applicant: Micron Technology, Inc.

Inventor： Suresh Rajgopal ,  Henrico L. Yahja ,  Steven Eskildsen ,  Dustin J. Carter

IPC: G06F3/06

Abstract: A selection device includes a multiplexer component, an input channel configured to couple at least the multiplexer to the memory sub-system controller, and a set of output channels coupled to the multiplexer component. Each of the set of output channels is further coupled to a respective memory device of a set of memory devices. Each of the set of output channels is configured to transmit data between the multiplexer component and the respective memory device. The selection device further includes a decoder component that is coupled to the input channel and each of the set of memory devices. The decoder component is configured to receive, from the memory sub-system controller via the input channel, a signal including a first signal portion configured to enable the decoder component and a second signal portion configured to identify a particular output channel of the set of output channels that is to transmit the data between the multiplexer component and the corresponding memory device. The decoder component is to decode the received signal and transmit the decoded signal to each of the set of memory devices. The decoded signal is to enable the transmission of the data between the multiplexer and the corresponding memory device via the particular output channel.

公开(公告)号：US20190088565A1

公开(公告)日：2019-03-21

申请号：US16196262

申请日：2018-11-20

Applicant: Micron Technology, Inc.

Inventor： Chan Yoo ,  Akshay Singh ,  Yi Xu ,  Liana Foster ,  Steven Eskildsen

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/48

CPC classification number: H01L23/3114 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/19 ,  H01L24/20 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45169 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48464 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3862 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.