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公开(公告)号:US11430917B2
公开(公告)日:2022-08-30
申请号:US16615835
申请日:2018-05-17
Applicant: Osram Opto Semiconductors GmbH
Inventor: Isabel Otto , Anna Kasprzak-Zablocka , Christian Leirer , Berthold Hahn
IPC: H01L33/40 , H01L33/38 , H01L33/00 , H01L31/0216 , H01L31/0224 , H01L33/32
Abstract: A semiconductor component may include a semiconductor body having a first semiconductor layer and a second semiconductor layer, a first main face and a second main face, opposite from the first main face, the first main face being formed by a surface of the first semiconductor layer and the second main face being formed by a surface of the second semiconductor layer. At least one side face may join the first main face to the second main face, an electrically conducting carrier layer, which covers the second main face at least in certain regions and extends from the second main face to at least one side face of the semiconductor body. An electrically conducting continuous deformation layer may cover the second main face at least in certain regions. The electrically conducting deformation layer may have an elasticity that is identical to or higher than the electrically conducting carrier layer.
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公开(公告)号:US20180212121A1
公开(公告)日:2018-07-26
申请号:US15742106
申请日:2016-07-11
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Christian Leirer , Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Berthold Hahn , Thomas Schwarz
CPC classification number: H01L33/62 , H01L33/0079 , H01L33/0095 , H01L33/22 , H01L33/382 , H01L33/44 , H01L33/486 , H01L33/505 , H01L33/52 , H01L33/647 , H01L2933/0016 , H01L2933/0025 , H01L2933/0033 , H01L2933/0041
Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.
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公开(公告)号:US20170207363A1
公开(公告)日:2017-07-20
申请号:US15327697
申请日:2015-07-23
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Lorenzo Zini , Alexander Frey , Joachim Hertkorn , Berthold Hahn
CPC classification number: H01L33/0079 , H01L33/32 , H01L33/62 , H01L2933/0066 , H01S5/0201 , H01S5/0217
Abstract: A method of producing optoelectronic semiconductor chips includes growing a semiconductor layer sequence on a growth substrate; applying at least one metallization to a contact side of the semiconductor layer sequence, which contact side faces away from the growth substrate; attaching an intermediate carrier to the semiconductor layer sequence, wherein a sacrificial layer is attached between the intermediate carrier and the semiconductor layer sequence; removing the growth substrate from the semiconductor layer sequence; structuring the semiconductor layer sequence into individual chip regions; at least partially dissolving the sacrificial layer; and subsequently removing the intermediate carrier, wherein, in removing the intermediate carrier, part of the sacrificial layer is still present, removing the intermediate carrier includes mechanically breaking remaining regions of the sacrificial layer, and the sacrificial layer is completely removed after removing the intermediate carrier.
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14.
公开(公告)号:US20160027980A1
公开(公告)日:2016-01-28
申请号:US14773864
申请日:2014-03-24
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Berthold Hahn , Johannes Baur
IPC: H01L33/62 , H01L33/38 , H01L31/0224 , H01L31/02 , H01L25/075 , H01L25/04 , H01L33/48 , H01L31/0203
CPC classification number: H01L33/62 , H01L25/042 , H01L25/0753 , H01L31/02002 , H01L31/0203 , H01L31/0224 , H01L31/0516 , H01L33/38 , H01L33/382 , H01L33/486 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , Y02E10/50 , H01L2924/00014
Abstract: An optoelectronics semiconductor chip has a substrate and a semiconductor body arranged on the substrate and has a semiconductor layer sequence. The semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and is provided to generate or to receive radiation. The first semiconductor layer is electrically conductively connected to a first contact and to a second contact. The first contact is formed on a front side of the substrate, facing the semiconductor body. The second contact is formed on a rear side of the substrate, facing away from the semiconductor body. The first contact and the second contact are electrically conductively connected to each other.
Abstract translation: 光电子半导体芯片具有基板和设置在基板上并具有半导体层序列的半导体本体。 半导体层序列包括布置在第一半导体层和第二半导体层之间的有源区,并且被提供以产生或接收辐射。 第一半导体层与第一触点和第二触点导电连接。 第一接触形成在基板的前侧,面向半导体本体。 第二触点形成在基板的背面,背离半导体本体。 第一触点和第二触点彼此导电连接。
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公开(公告)号:US20220328738A1
公开(公告)日:2022-10-13
申请号:US17639160
申请日:2020-08-19
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Berthold Hahn , Georg Bogner
Abstract: A semiconductor component includes a radiation exit surface; a semiconductor body having an active region that generates radiation; wherein a molded body molded onto the semiconductor body; contacts for external electrical contacting of the semiconductor component are accessible on an outer side of the molded body; a deflection structure arranged between the active region and the radiation exit surface; a planarization layer arranged on the deflection structure; and a polarizer arranged on a side of the planarization layer facing away from the semiconductor body; wherein the semiconductor body on a side facing away from the radiation exit surface includes a mirror structure having at least one dielectric layer and a metallic connection layer, and the dielectric layer is arranged at locations between the semiconductor body and the metallic connection layer.
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公开(公告)号:US10535806B2
公开(公告)日:2020-01-14
申请号:US15742106
申请日:2016-07-11
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Christian Leirer , Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Berthold Hahn , Thomas Schwarz
IPC: H01L33/62 , H01L33/48 , H01L33/52 , H01L33/00 , H01L33/22 , H01L33/38 , H01L33/44 , H01L33/50 , H01L33/64
Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.
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公开(公告)号:US10411155B2
公开(公告)日:2019-09-10
申请号:US15327697
申请日:2015-07-23
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Lorenzo Zini , Alexander Frey , Joachim Hertkorn , Berthold Hahn
Abstract: A method of producing optoelectronic semiconductor chips includes growing a semiconductor layer sequence on a growth substrate; applying at least one metallization to a contact side of the semiconductor layer sequence, which contact side faces away from the growth substrate; attaching an intermediate carrier to the semiconductor layer sequence, wherein a sacrificial layer is attached between the intermediate carrier and the semiconductor layer sequence; removing the growth substrate from the semiconductor layer sequence; structuring the semiconductor layer sequence into individual chip regions; at least partially dissolving the sacrificial layer; and subsequently removing the intermediate carrier, wherein, in removing the intermediate carrier, part of the sacrificial layer is still present, removing the intermediate carrier includes mechanically breaking remaining regions of the sacrificial layer, and the sacrificial layer is completely removed after removing the intermediate carrier.
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公开(公告)号:US10121775B2
公开(公告)日:2018-11-06
申请号:US15038034
申请日:2014-11-07
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Christian Leirer , Berthold Hahn , Karl Engl , Johannes Baur , Siegfried Herrmann , Andreas Ploessl , Simeon Katz , Tobias Meyer , Lorenzo Zini , Markus Maute
Abstract: Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection.
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公开(公告)号:US09997671B2
公开(公告)日:2018-06-12
申请号:US14739684
申请日:2015-06-15
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Johannes Baur , Berthold Hahn , Volker Haerle , Karl Engl , Joachim Hertkorn , Tetsuya Taki
IPC: H01L33/32 , H01L33/50 , H01L33/00 , H01L33/08 , H01L21/02 , H01L21/78 , H01L29/02 , H01L33/46 , H01L23/00
CPC classification number: H01L33/32 , H01L21/02612 , H01L21/78 , H01L24/73 , H01L29/02 , H01L33/0079 , H01L33/08 , H01L33/46 , H01L33/507 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49107 , H01L2224/73265 , H01L2924/00012 , H01L2924/00014
Abstract: A composite substrate has a carrier and a utility layer. The utility layer is attached to the carrier by means of a dielectric bonding layer and the carrier contains a radiation conversion material. Other embodiments relate to a semiconductor chip having such a composite substrate, a method for producing a composite substrate and a method for producing a semiconductor chip with a composite substrate.
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公开(公告)号:US09853018B2
公开(公告)日:2017-12-26
申请号:US15021393
申请日:2014-09-10
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: Christian Leirer , Berthold Hahn , Roland Zeisel , Johannes Baur , Karl Engl
CPC classification number: H01L25/167 , H01L25/0753 , H01L27/15 , H01L27/156 , H01L33/382 , H01L33/483 , H01L33/62 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48479 , H01L2924/00014 , H01L2924/0002 , H01L2933/0016 , H01L2224/48471 , H01L2924/00 , H01L2224/4554
Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence. The semiconductor layer sequence includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and an active zone having a p-n junction, which active zone is formed between the first semiconductor region and the second semiconductor region. The semiconductor layer sequence is arranged on a carrier. The semiconductor chip also includes a first contact, which is provided for electrically connecting the first semiconductor region, and a second contact, which is different from the first contact and which is provided for electrically connecting the second semiconductor region. In addition, the semiconductor chip includes a first capacitive electrical element, which is connected in parallel with the p-n junction and which has a first dielectric element.
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