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11.发明授权Fabrication of electronic circuit elements using unpatterned semiconductor layers 失效使用未图案化的半导体层制造电子电路元件公开(公告)号：US06683333B2
公开(公告)日：2004-01-27
申请号：US09904109
申请日：2001-07-12
IPC分类号： H01L31072
CPC分类号： H01L28/60 , H01L27/1255 , H01L29/66757 , H01L29/66765
摘要： A thin-film transistor array comprises at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer. The shared semiconductor layer extends continuously between the first and second transistors, and includes a concentration of dopant that increases a resistivity of the semiconductor layer and reduces a leakage current through the semiconductor layer while permitting functioning of the transistor array.
摘要翻译： 薄膜晶体管阵列至少包括第一和第二晶体管。 第一和第二晶体管中的每一个包括共享硅层，即有源层。 共享半导体层在第一和第二晶体管之间连续延伸，并且包括增加半导体层的电阻率的掺杂剂的浓度，并且减小了通过半导体层的漏电流，同时允许晶体管阵列的功能。
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12.发明授权Preferred methods for producing electrical circuit elements used to control an electronic display 有权用于制造用于控制电子显示器的电路元件的优选方法公开(公告)号：US06413790B1
公开(公告)日：2002-07-02
申请号：US09621049
申请日：2000-07-21
IPC分类号： H01L2100
CPC分类号： H01L21/00 , B33Y80/00 , B82Y30/00 , H01L27/32 , H01L51/0004 , H01L51/0516 , H01L51/0545 , H01L51/42 , H01L51/5012
摘要： Systems and methods for producing thin film transistor structures useful in controlling electronic displays. Thin film transistors are fabricated using all-additive methods including printing techniques, soft lithography and material deposition methods. The thin film transistors can be deposited with the gate on the bottom or on the top of the structure. The deposition methods include the possibility of isolating nearly completely the transistor structure from the electronic display devices, so as to minimize or eliminate deleterious interactions therebetween.
摘要翻译： 用于制造用于控制电子显示器的薄膜晶体管结构的系统和方法。 使用包括印刷技术，软光刻和材料沉积方法的全部添加方法制造薄膜晶体管。 薄膜晶体管可以沉积在结构的底部或顶部上的栅极。 沉积方法包括从电子显示装置几乎完全隔离晶体管结构的可能性，以便最小化或消除它们之间的有害的相互作用。
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13.发明授权Use of a storage capacitor to enhance the performance of an active matrix driven electronic display 有权使用存储电容来增强有源矩阵驱动电子显示器的性能公开(公告)号：US07859637B2
公开(公告)日：2010-12-28
申请号：US11612509
申请日：2006-12-19
IPC分类号： C09K19/52
CPC分类号： G09G3/344 , G02F1/1334 , G02F1/136213 , G02F1/167 , G02F1/172 , G09G2300/0809 , G09G2300/0842 , G09G2310/0262 , G09G2320/0252
摘要： A system and method of use of a storage capacitor to improve the appearance and addressing characteristics of an electronically driven display. The capacitor is formed by the overlap of portions of electrodes used to address different pixels, or by the overlap of an addressing line and a conductor. An insulator layer situated between the capacitor electrodes can be the same insulator layer present in an FET transistor used to address the pixel. Methods of use of capacitors to achieve improved display addressing are disclosed.
摘要翻译： 一种使用存储电容器来改善电子显示器的外观和寻址特性的系统和方法。 电容器由用于寻址不同像素的电极的部分的重叠，或通过寻址线和导体的重叠形成。 位于电容器电极之间的绝缘体层可以是用于解决像素的FET晶体管中存在的相同的绝缘体层。 公开了使用电容器实现改进的显示寻址的方法。
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公开(公告)号：US06825068B2
公开(公告)日：2004-11-30
申请号：US09836884
申请日：2001-04-17
申请人： Kevin L. Denis , Yu Chen , Paul S. Drzaic , Joseph M. Jacobson , Peter T. Kazlas
发明人： Kevin L. Denis , Yu Chen , Paul S. Drzaic , Joseph M. Jacobson , Peter T. Kazlas
IPC分类号： H01L2100
CPC分类号： H01L29/66765 , H01L29/78603
摘要： Transistors are formed by depositing at least one layer of semiconductor material on a substrate comprising a polyphenylene polyimide. The substrate permits the use of processing temperatures in excess of 300° C. during the processes used to form the transistors, thus allowing the formation of high quality silicon semiconductor layers. The substrate also has a low coefficient of thermal expansion, which closely matches that of silicon, thus reducing any tendency for a silicon layer to crack or delaminate.
摘要翻译： 晶体管通过在包含聚亚苯基聚酰亚胺的衬底上沉积至少一层半导体材料形成。 在用于形成晶体管的工艺期间，衬底允许使用超过300℃的处理温度，从而允许形成高质量的硅半导体层。 该基板也具有低的热膨胀系数，其与硅的热膨胀系数非常接近，从而减少硅层破裂或分层的任何趋势。
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公开(公告)号：US06538801B2
公开(公告)日：2003-03-25
申请号：US10054721
申请日：2001-11-12
申请人： Joseph M. Jacobson , Paul S. Drzaic , Ian D. Morrison , Anthony E. Pullen , Jianna Wang , Robert W. Zehner , Caprice L. Gray , Gregg M. Duthaler , Michael McCreary , Emily J. Pratt
发明人： Joseph M. Jacobson , Paul S. Drzaic , Ian D. Morrison , Anthony E. Pullen , Jianna Wang , Robert W. Zehner , Caprice L. Gray , Gregg M. Duthaler , Michael McCreary , Emily J. Pratt
IPC分类号： G09G334
CPC分类号： B41J2/01 , B41J2/02 , B41J3/4076 , B82Y20/00 , C09D11/30 , C09D11/50 , G02B26/026 , G02F1/133305 , G02F1/13336 , G02F1/1334 , G02F1/13439 , G02F1/1347 , G02F1/167 , G02F1/19 , G02F2201/16 , G02F2201/44 , G02F2202/28 , G02F2202/36 , G04B47/00 , G09F9/372 , H01L51/005 , H01L51/0077 , H01L51/0508 , H01L51/0512 , H05K1/097 , H05K3/105 , H05K3/1241
摘要： An electrophoretic display comprises a fluid and a plurality of nanoparticles having diameters substantially less the wavelengths of visible light such that, when the nanoparticles are in a dispersed state and uniformly dispersed throughout the fluid, the fluid presents a first optical characteristic, but when the nanoparticles are in an aggregated state in which they are gathered into aggregates substantially larger than the individual nanoparticles, the fluid presents a second optical characteristic different from the first optical characteristic. The electrophoretic display further comprises at least one electrode arranged to apply an electric field to the nanoparticle-containing fluid and thereby move the nanoparticles between their dispersed and aggregated states. Various compound particles comprising multiple nanoparticles, alone or in combination with larger objects, and processes for the preparation of such compound particles, are also described.
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公开(公告)号：US06504524B1
公开(公告)日：2003-01-07
申请号：US09520743
申请日：2000-03-08
IPC分类号： G09G334
CPC分类号： G09G3/344 , G02F1/167 , G09G2310/04 , G09G2310/06 , G09G2320/0204
摘要： Novel addressing schemes for controlling electronically addressable displays include the use of addressing signals with additional signals having opposite polarity and equal integrated signal strength and addressing schemes that minimize the number of state changes that a display element undergoes. In one embodiment, pre-pulses are employed to apply a pre-stress to an display element that is equal and opposite to the electrical stress applied in addressing the element. In another embodiment, the addressing signal is followed by a post-stressing pulse. Methods for minimizing the number of display elements that must change state to change the image displayed include the determination of a set of elements that must be deactivated and a set of elements that must be activated to change the image depicted by a display.
摘要翻译： 用于控制电子可寻址显示器的新型寻址方案包括使用具有相反极性和相等的集成信号强度的附加信号的寻址信号以及使显示元件经历的状态变化的数量最小化的寻址方案。 在一个实施例中，采用预脉冲来对显示元件施加预应力，所述显示元件与在寻址元件时施加的电应力相等和相反。 在另一个实施例中，寻址信号之后是后应力脉冲。 用于最小化必须改变状态以改变显示的图像的显示元素的数量的方法包括必须被去激活的一组元素的确定以及必须被激活以改变由显示器描绘的图像的一组元素。
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17.发明授权公开(公告)号：US06545291B1
公开(公告)日：2003-04-08
申请号：US09650620
申请日：2000-08-30
申请人： Karl R. Amundson , Gregg Duthaler , Paul S. Drzaic
发明人： Karl R. Amundson , Gregg Duthaler , Paul S. Drzaic
IPC分类号： H01L3524
CPC分类号： H01L51/0516 , H01L27/32 , H01L51/0005 , H01L51/0021 , H01L51/0036 , H01L51/0038 , H01L51/0512 , H01L51/0545
摘要： A transistor having a channel width, W, and a channel length, L, defined by non-rectangular electrodes. The transistor is a thin film field effect transistor having an insulated gate electrode. One of a source and drain electrodes is connected to a display electrode and one is connected to a data line. The source and drain electrodes can be interdigitated to provide a desired W/L ratio. The gate is connected to a select line. An overlap region between a display electrode and a select line for another pixel defines a capacitor. The transistor is fabricated to be situated behind the display electrode so as to maximize an aperture ratio. The design enables the use of conventional printing methods, such as screen printing, ink jet printing, printing through a stencil, flexo-gravure printing and offset printing.
摘要翻译： 具有由非矩形电极限定的沟道宽度W和沟道长度L的晶体管。 晶体管是具有绝缘栅电极的薄膜场效应晶体管。 源极和漏极之一连接到显示电极，一个连接到数据线。 源极和漏极可以相互交叉以提供所需的W / L比。 门连接到选择线。 显示电极与另一像素的选择线之间的重叠区域限定电容器。 晶体管被制造成位于显示电极的后面，以便最大化开口率。 该设计使得能够使用常规的印刷方法，例如丝网印刷，喷墨印刷，通过模版印刷，柔版印刷和胶版印刷。
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18.发明授权公开(公告)号：US06750473B2
公开(公告)日：2004-06-15
申请号：US10354721
申请日：2003-01-30
申请人： Karl R. Amundson , Gregg Duthaler , Paul S. Drzaic
发明人： Karl R. Amundson , Gregg Duthaler , Paul S. Drzaic
IPC分类号： H01L3524
CPC分类号： H01L51/0516 , H01L27/32 , H01L51/0005 , H01L51/0021 , H01L51/0036 , H01L51/0038 , H01L51/0512 , H01L51/0545
摘要： A transistor having a channel width, W, and a channel length, L, defined by non-rectangular electrodes. The transistor is a thin film field effect transistor having an insulated gate electrode. One of a source and drain electrodes is connected to a display electrode and one is connected to a data line. The source and drain electrodes can be interdigitated to provide a desired W/L ratio. The gate is connected to a select line. An overlap region between a display electrode and a select line for another pixel defines a capacitor. The transistor is fabricated to be situated behind the display electrode so as to maximize an aperture ratio. The design enables the use of conventional printing methods, such as screen printing, ink jet printing, printing through a stencil, flexo-gravure printing and offset printing.
摘要翻译： 具有由非矩形电极限定的沟道宽度W和沟道长度L的晶体管。 晶体管是具有绝缘栅电极的薄膜场效应晶体管。 源极和漏极之一连接到显示电极，一个连接到数据线。 源极和漏极可以相互交叉以提供所需的W / L比。 门连接到选择线。 显示电极与另一像素的选择线之间的重叠区域限定电容器。 晶体管被制造成位于显示电极的后面，以便最大化开口率。 该设计使得能够使用常规的印刷方法，例如丝网印刷，喷墨印刷，通过模版印刷，柔版印刷和胶版印刷。
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19.发明授权公开(公告)号：US10261370B2
公开(公告)日：2019-04-16
申请号：US13253844
申请日：2011-10-05
申请人： Paul S. Drzaic , Jeremy C. Franklin , Stephen Brian Lynch , Scott A. Myers , Benjamin M. Rappoport , Fletcher R. Rothkopf , John P. Ternus
发明人： Paul S. Drzaic , Jeremy C. Franklin , Stephen Brian Lynch , Scott A. Myers , Benjamin M. Rappoport , Fletcher R. Rothkopf , John P. Ternus
IPC分类号： G02F1/1345
摘要： An electronic device may be provided with a display having a thin-film transistor layer. One or more holes in the thin-film transistor layer may be used to form pathways from display circuitry to other circuitry underneath the display. One or more conductive bridges may pass through holes in the thin-film transistor layer and may have one end that couples to the display circuitry and a second end that couples to a printed circuit underneath the display. These conductive bridges may be formed from wire bonding. Wire bond connections may be encapsulated with potting material to improve the reliability of the wire bond and increase the resiliency of the display. Display signal lines may be routed through holes in a thin-film transistor layer to run along a backside of the display thereby reducing the need for space in the border region for display circuitry.
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公开(公告)号：US08350703B2
公开(公告)日：2013-01-08
申请号：US12987995
申请日：2011-01-10
IPC分类号： G08B13/14
CPC分类号： G06K19/07749 , D10B2401/18 , G06K19/027 , G06K19/07722 , G06K19/07758 , H01L24/24 , H01L24/82 , H01L2224/24227 , H01L2224/76155 , H01L2224/82039 , H01L2224/82102 , H01L2924/01004 , H01L2924/01005 , H01L2924/01027 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/19041 , H01L2924/19042 , H01L2924/3011 , Y10T29/49018 , Y10T29/49155 , H01L2924/00
摘要： A Radio Frequency Identification (RFID) tag. The RFID tag comprises a flexible substrate and an integrated circuit embedded within the flexible substrate. The top surface of the integrated circuit is coplanar with the flexible substrate. At least one conductive element is formed on the flexible substrate. The conductive element is electrically connected to the integrated circuit. The conductive element serves as an antenna for the RFID tag.
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