公开(公告)号：US11217696B2

公开(公告)日：2022-01-04

申请号：US16354396

申请日：2019-03-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Do Hyung Kim ,  Gun Hee Kim ,  Hyeon Sik Kim ,  Sang Ho Park ,  Joo Hee Jeon

IPC: H01L29/12 ,  H01L29/786 ,  H01L29/417 ,  H01L27/32 ,  H01L29/08

Abstract: A thin film transistor array panel includes a substrate, a first gate electrode on the substrate, a semiconductor layer on the first gate electrode, the semiconductor layer including a drain region, a source region, a lightly doped drain (LDD) region, and a channel region, a second gate electrode on the semiconductor layer, the first gate electrode and the second gate electrode each overlapping the channel region, a control gate electrode that overlaps the LDD region, and a source electrode and a drain electrode respectively connected with the source region and the drain region of the semiconductor layer.

公开(公告)号：US09653609B2

公开(公告)日：2017-05-16

申请号：US14718336

申请日：2015-05-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hee jun Yoo ,  Sang Ho Park ,  Joung-Keun Park ,  Ki Wan Ahn ,  Joo Sun Yoon ,  Seung Min Lee ,  Yong Jae Jang ,  Jae Hyuk Jang ,  Kwang Young Choi ,  Jung Hyun Kim

IPC: H01L29/786 ,  H01L29/417 ,  H01L27/07

CPC classification number: H01L29/78648 ,  H01L27/0705 ,  H01L29/41733 ,  H01L29/78672 ,  H01L29/78696

Abstract: A thin film transistor including a substrate; a first gate electrode on the substrate; a first insulating layer covering the substrate and the first gate electrode; a semiconductor on the first insulating layer and overlapping the first gate electrode; a second insulating layer covering the first insulating layer and the semiconductor; a second gate electrode on the second insulating layer and crossing the first gate electrode in plane; a third insulating layer covering the second gate electrode and the second insulating layer; a first source electrode and a first drain electrode on the third insulating layer and connected to the semiconductor; and a second source electrode and a second drain electrode on a same layer as the first source electrode and the first drain electrode and connected to the semiconductor.

公开(公告)号：US09147741B2

公开(公告)日：2015-09-29

申请号：US13892574

申请日：2013-05-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Jae Na ,  Yoon Ho Khang ,  Sang Ho Park ,  Dong Hwan Shim ,  Se Hwan Yu ,  Yong Su Lee ,  Myoung Geun Cha

IPC: H01L21/84 ,  H01L21/20 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/4908 ,  H01L29/518 ,  H01L29/78603 ,  H01L29/78633

Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管显示面板包括基板，形成在基板上的第一绝缘层，形成在第一绝缘层上的半导体层，形成在半导体层上的第二绝缘层，以及 形成在第二绝缘层上的栅电极，其中第一绝缘层包括遮光材料，第一绝缘层的厚度大于或等于第二绝缘层的厚度。

公开(公告)号：US20140353592A1

公开(公告)日：2014-12-04

申请号：US14460395

申请日：2014-08-15

Applicant: SAMSUNG DISPLAY CO., LTD. ,  SNU R&DB FOUNDATION

Inventor： Sang Ho Park ,  Young Ki Shin ,  Yoon Ho Khang ,  Joo Hyung Lee ,  Hyung Woo Lee ,  Seung Hun Hong

IPC: H01L27/28 ,  H01L51/00 ,  H01L51/05

CPC classification number: H01L27/283 ,  B82Y10/00 ,  H01L27/3274 ,  H01L51/0048 ,  H01L51/0558

Abstract: A thin film transistor includes a gate electrode configured to receive a control voltage, a source electrode insulated from the gate electrode, and configured to receive an input voltage, a drain electrode insulated from the gate electrode, and configured to receive an output voltage, at least two carbon nanotube patterns formed in a channel region between the source electrode and the drain electrode, wherein the carbon nanotube patterns are separated from each other, and at least one floating electrode connecting the two carbon nanotube patterns to each other.

Abstract translation: 薄膜晶体管包括被配置为接收控制电压的栅电极，与栅电极绝缘的源电极，并且被配置为接收输入电压，与栅电极绝缘的漏电极，并且被配置为接收输出电压， 在源电极和漏电极之间的沟道区域中形成的至少两个碳纳米管图案，其中碳纳米管图案彼此分离，以及至少一个将两个碳纳米管图案彼此连接的浮动电极。

公开(公告)号：US11848409B2

公开(公告)日：2023-12-19

申请号：US17867627

申请日：2022-07-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jin Yeong Kim ,  Mi Jin Park ,  Sang Ho Park ,  Tae Hoon Yang ,  Sung Jin Lee

IPC: H01L33/62 ,  H01L25/075 ,  G09G3/32 ,  H01L25/16 ,  H01L33/20 ,  H01L33/38 ,  H10K59/12 ,  H10K59/122 ,  H10K59/131 ,  H10K59/179 ,  G09G3/20

CPC classification number: H01L33/62 ,  G09G3/32 ,  H01L25/0753 ,  H01L25/167 ,  H01L33/20 ,  H01L33/38 ,  H10K59/12 ,  H10K59/122 ,  H10K59/131 ,  H10K59/179 ,  G09G3/2003 ,  G09G2300/0426 ,  G09G2300/0439

Abstract: A display device includes a substrate including a display area and a non-display area, a pixel located in the display area, a pad unit on one side of the non-display area, and a driver connected to the pixel. The pixel includes a first insulating layer, a first light emitting element on the first insulating layer, a second insulating layer on the first light emitting element and exposing one end portion and another end portion of the first light emitting element, a first contact electrode on the second insulating layer and connected to the one end portion of the first light emitting element, and a second contact electrode on the second insulating layer and connected to the other end portion of the first light emitting element. The pad unit includes a pad metal layer, a first pad insulating layer, a second pad insulating layer, and a pad electrode.

公开(公告)号：US10861978B2

公开(公告)日：2020-12-08

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US10297772B2

公开(公告)日：2019-05-21

申请号：US15711121

申请日：2017-09-21

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Kyu Lee ,  Tae Hyun Kim ,  Sang Ho Park ,  Dong Hwan Shim ,  Seung Min Lee ,  Seung-Hwan Cho

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/52

Abstract: A display device includes: a substrate including a display area, a non-display area at which the image is not displayed and a first area including the display area, the non-display area including a bending area at which the display device is bendable between the first area and a second area; a first wire in the first area, the first wire and connected to the display area; a second wire in the second area; a protection layer in the first, second and bending areas, first and second contact holes in the protection layer and exposing the first and second wires; and a connection wire connected to the first wire, extended from the first area to traverse the bending area and connected to the second wire. The connection wire includes a plurality of conductive layers contacting each other, the plurality of conductive layers including a same material.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20140138684A1

公开(公告)日：2014-05-22

申请号：US14166183

申请日：2014-01-28

Applicant: Samsung Display Co., Ltd.

Inventor： YONG SU LEE ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang

IPC: H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/0262 ,  H01L21/385 ,  H01L21/441 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/78696

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

Abstract translation: 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。