公开(公告)号：US09450132B2

公开(公告)日：2016-09-20

申请号：US14514552

申请日：2014-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sho Kato ,  Yoshikazu Hiura ,  Akihisa Shimomura ,  Takashi Ohtsuki ,  Satoshi Toriumi ,  Yasuyuki Arai

IPC: H01L31/077 ,  H01L31/20 ,  H01L21/02 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/075 ,  H01L31/18

CPC classification number: H01L31/077 ,  H01L21/0237 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/075 ,  H01L31/1804 ,  H01L31/20 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the butler layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.

Abstract translation: 目的在于提高光电转换装置的转换效率，而不增加制造步骤。 光电转换装置包括使用在支撑基板上形成的具有一种导电类型的单晶半导体形成的第一半导体层，包括单晶区域和非晶区域的缓冲层，包括单晶区域的第二半导体层 和非晶区域，并且设置在管状层上方，以及设置在第二半导体层上的具有与一种导电类型相反的导电类型的第三半导体层。 单晶区域的比例高于第二半导体层中的第一半导体层侧的非晶区域的比例，并且非晶区域的比例高于第三半导体层侧的单晶区域的比例。

公开(公告)号：US20230230979A1

公开(公告)日：2023-07-20

申请号：US18125426

申请日：2023-03-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Tomoaki Moriwaka ,  Shinya Sasagawa ,  Takashi Ohtsuki

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L27/1255 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869 ,  H01L21/76849 ,  H01L23/53223

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

公开(公告)号：US11616085B2

公开(公告)日：2023-03-28

申请号：US17557355

申请日：2021-12-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Tomoaki Moriwaka ,  Shinya Sasagawa ,  Takashi Ohtsuki

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/768 ,  H01L23/532

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

公开(公告)号：US11211408B2

公开(公告)日：2021-12-28

申请号：US16863291

申请日：2020-04-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Tomoaki Moriwaka ,  Shinya Sasagawa ,  Takashi Ohtsuki

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/768 ,  H01L23/532

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

公开(公告)号：US10050132B2

公开(公告)日：2018-08-14

申请号：US15664106

申请日：2017-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Akihisa Shimomura ,  Yasumasa Yamane ,  Yuhei Sato ,  Tetsuhiro Tanaka ,  Masashi Tsubuku ,  Toshihiko Takeuchi ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toshiya Endo

IPC: H01L21/00 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786

Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. One feature resides in forming an oxide semiconductor film over an oxygen-introduced insulating film, and then forming the source and drain electrodes with an antioxidant film thereunder. Here, in the antioxidant film, the width of a region overlapping with the source and drain electrodes is longer than the width of a region not overlapping with them. The transistor formed as such has less defects in the channel region, which will improve reliability of the semiconductor device.

公开(公告)号：US09520410B2

公开(公告)日：2016-12-13

申请号：US14446934

申请日：2014-07-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Satoshi Murakami ,  Motomu Kurata ,  Hiroyuki Hata ,  Mitsuhiro Ichijo ,  Takashi Ohtsuki ,  Aya Anzai ,  Masayuki Sakakura

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/12 ,  H01L27/32 ,  H01L51/52 ,  H01L33/60 ,  H01L51/00 ,  H01L51/56

CPC classification number: H04N5/655 ,  G06F3/02 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3244 ,  H01L27/3258 ,  H01L27/3276 ,  H01L33/60 ,  H01L51/0005 ,  H01L51/5246 ,  H01L51/56 ,  H01L2224/4847 ,  H01L2227/323 ,  H01L2251/5323 ,  H04N5/642

Abstract: The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed.