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    WEAR LEVELING IN EEPROM EMULATOR FORMED OF FLASH MEMORY CELLS
    19.
    发明申请
    WEAR LEVELING IN EEPROM EMULATOR FORMED OF FLASH MEMORY CELLS 有权

    公开(公告)号：US20220130477A1

    公开(公告)日：2022-04-28

    申请号：US17571443

    申请日：2022-01-07

    Applicant: Silicon Storage Technology, Inc.

    Inventor： Guangming Lin ,  Xiaozhou Qian ,  Xiao Yan Pl ,  Vipin Tiwari ,  Zhenlin Ding

    IPC: G11C16/34 ,  G11C16/04 ,  G11C16/26 ,  G11C16/14 ,  G11C16/10

    Abstract: The present embodiments relate to systems and methods for implementing wear leveling in a flash memory device that emulates an EEPROM. The embodiments utilize an index array, which stores an index word for each logical address in the emulated EEPROM. The embodiments comprise a system and method for receiving an erase command and a logical address, the logical address corresponding to a sector of physical words of non-volatile memory cells in an array of non-volatile memory cells, the sector comprising a first physical word, a last physical word, and one or more physical words between the first physical word and the last physical word; when a current word, identified by an index bit, is the last physical word in the sector, erasing the sector; and when the current word is not the last physical word in the sector, changing a next index bit.

    Non-volatile memory device with stored index information
    20.
    发明授权
    Non-volatile memory device with stored index information 有权

    公开(公告)号：US11074980B2

    公开(公告)日：2021-07-27

    申请号：US16813317

    申请日：2020-03-09

    Applicant: Silicon Storage Technology, Inc.

    Inventor： Xiaozhou Qian ,  Xiao Yan Pi ,  Vipin Tiwari

    IPC: G11C16/14 ,  G11C7/10 ,  G11C16/28

    Abstract: A memory device that includes a memory array having pluralities of non-volatile memory cells, a plurality of index memory cells each associated with a different one of the pluralities of the non-volatile memory cells, and a controller. The controller is configured to erase the pluralities of non-volatile memory cells, set each of the index memory cells to a first state, and program first data into the memory array by reading the plurality of index memory cells and determining that a first one of the index memory cells is in the first state, programming the first data into the plurality of the non-volatile memory cells associated with the first one of the index memory cells, and setting the first one of the index memory cells to a second state different from the first state.

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