公开(公告)号：US20130023123A1

公开(公告)日：2013-01-24

申请号：US13187357

申请日：2011-07-20

申请人： Yifeng Zhou ,  Srinivas D. Nemani ,  Khoi Doan ,  Jeremiah T. P. Pender

发明人： Yifeng Zhou ,  Srinivas D. Nemani ,  Khoi Doan ,  Jeremiah T. P. Pender

IPC分类号： H01L21/302

CPC分类号： H01L21/31138 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L2221/1063

摘要： Methods of removing photoresists from low-k dielectric films are described. For example, a method includes forming and patterning a photoresist layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. Trenches are formed in the exposed portions of the low-k dielectric layer. A plurality of process cycles is performed to remove the photoresist layer. Each process cycle includes forming a silicon source layer on surfaces of the trenches of the low-k dielectric layer, and exposing the photoresist layer to an oxygen source to form an Si—O-containing layer on the surfaces of the trenches of the low-k dielectric layer and to remove at least a portion of the photoresist layer.

摘要翻译： 描述了从低k电介质膜去除光致抗蚀剂的方法。 例如，一种方法包括在低k电介质层之上形成和图案化光致抗蚀剂层，低k电介质层设置在衬底之上。 沟槽形成在低k电介质层的露出部分。 执行多个处理循环以去除光致抗蚀剂层。 每个处理循环包括在低k电介质层的沟槽的表面上形成硅源层，并且将光致抗蚀剂层暴露于氧源以在低介电层的沟槽的表面上形成含Si-O的层， k电介质层并去除光致抗蚀剂层的至少一部分。

公开(公告)号：US20130023122A1

公开(公告)日：2013-01-24

申请号：US13187304

申请日：2011-07-20

申请人： Srinivas D. Nemani ,  Yifeng Zhou ,  Dmitry Lubomirsky ,  Ellie Yieh

发明人： Srinivas D. Nemani ,  Yifeng Zhou ,  Dmitry Lubomirsky ,  Ellie Yieh

IPC分类号： H01L21/311

CPC分类号： H01L21/31116 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76826

摘要： Methods of multiple patterning of low-k dielectric films are described. For example, a method includes forming and patterning a first mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. A second mask layer is formed and patterned above the first mask layer. A pattern of the second mask layer is transferred at least partially into the low-k dielectric layer by modifying first exposed portions of the low-k dielectric layer with a first plasma process and removing the modified portions of the low-k dielectric layer. Subsequently, a pattern of the first mask layer is transferred at least partially into the low-k dielectric layer by modifying second exposed portions of the low-k dielectric layer with a second plasma process and removing the modified portions of the low-k dielectric layer.

摘要翻译： 描述了低k电介质膜的多次图案化方法。 例如，一种方法包括在低k电介质层上形成和图案化第一掩模层，低k电介质层设置在衬底之上。 第二掩模层在第一掩模层之上形成并图案化。 通过用第一等离子体处理修改低k电介质层的第一暴露部分并去除低k电介质层的修改部分，将第二掩模层的图案至少部分地转移到低k电介质层中。 随后，通过用第二等离子体处理修改低k电介质层的第二暴露部分，将第一掩模层的图案至少部分地转移到低k电介质层中，并且去除低k电介质层的修饰部分 。

公开(公告)号：US20120077344A1

公开(公告)日：2012-03-29

申请号：US13070913

申请日：2011-03-24

申请人： Yifeng Zhou ,  Srinivas D. Nemani ,  Khoi Doan ,  Jeremiah T. P. Pender

发明人： Yifeng Zhou ,  Srinivas D. Nemani ,  Khoi Doan ,  Jeremiah T. P. Pender

IPC分类号： H01L21/302

CPC分类号： H01L21/31138 ,  H01L21/3105 ,  H01L21/76814 ,  H01L2221/1063

摘要： Methods of patterning low-k dielectric films are described.

摘要翻译： 描述了低k介电膜图案的方法。

公开(公告)号：US20110014798A1

公开(公告)日：2011-01-20

申请号：US12891426

申请日：2010-09-27

申请人： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Ellie Yieh

发明人： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Ellie Yieh

IPC分类号： H01L21/31

CPC分类号： C23C16/345 ,  C23C16/452 ,  C23C16/56

摘要： A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.

摘要翻译： 一种在衬底上沉积含硅和氮的膜的方法。 该方法包括将含硅前体引入到包含基底的沉积室中，其中含硅前体包含至少两个硅原子。 该方法还包括用位于沉积室外部的远程等离子体系统产生至少一种自由基氮前体。 此外，该方法包括将自由基氮前体引入沉积室，其中自由基含氮和含硅前体将含硅和氮的膜反应并沉积在基底上。 此外，该方法包括在蒸汽环境中退火含硅和氮的膜以形成氧化硅膜，其中蒸汽环境包括水和酸性蒸汽。

公开(公告)号：US20100255655A1

公开(公告)日：2010-10-07

申请号：US12817840

申请日：2010-06-17

申请人： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

发明人： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

IPC分类号： H01L21/762

CPC分类号： H01L21/31633 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02337 ,  H01L21/3105 ,  H01L21/31608

摘要： Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer filling a portion of a trench on the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may further include depositing additional silicon oxide over the cured silicon oxide to fill the trench. The methods may also include removing the acidic vapor from the semiconductor processing chamber.

摘要翻译： 提供了在基板上固化氧化硅层的方法。 所述方法可以包括提供半导体处理室和衬底并形成填充衬底上的沟槽的一部分的氧化硅层的过程，所述氧化硅层包括作为形成副产物的碳物质。 所述方法还包括将酸性蒸汽引入半导体处理室，酸性蒸气与氧化硅层反应以从氧化硅层除去碳物质。 所述方法还可以包括在固化的氧化硅上沉积额外的氧化硅以填充沟槽。 所述方法还可以包括从半导体处理室去除酸性蒸汽。

公开(公告)号：US07790634B2

公开(公告)日：2010-09-07

申请号：US11753918

申请日：2007-05-25

申请人： Jeffrey C. Munro ,  Srinivas D. Nemani

发明人： Jeffrey C. Munro ,  Srinivas D. Nemani

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/31633 ,  C23C16/401 ,  C23C16/452 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3105

摘要： Methods of making a silicon oxide layer on a substrate are described. The methods may include forming the silicon oxide layer on the substrate in a reaction chamber by reacting an atomic oxygen precursor and a silicon precursor and depositing reaction products on the substrate. The atomic oxygen precursor is generated outside the reaction chamber. The methods also include heating the silicon oxide layer at a temperature of about 600° C. or less, and exposing the silicon oxide layer to an induced coupled plasma. Additional methods are described where the deposited silicon oxide layer is cured by exposing the layer to ultra-violet light, and also exposing the layer to an induced coupled plasma.

摘要翻译： 描述了在衬底上制造氧化硅层的方法。 所述方法可以包括通过使原子氧前体和硅前体反应并在基底上沉积反应产物，在反应室中的衬底上形成氧化硅层。 原子氧前体在反应室外产生。 所述方法还包括在约600℃或更低的温度下加热氧化硅层，并将氧化硅层暴露于感应耦合等离子体。 描述了通过将层暴露于紫外光而使沉积的氧化硅层固化并且还将该层暴露于感应耦合等离子体的附加方法。

公开(公告)号：US07749563B2

公开(公告)日：2010-07-06

申请号：US10266551

申请日：2002-10-07

申请人： Yi Zheng ,  Srinivas D. Nemani ,  Li-Qun Xia

发明人： Yi Zheng ,  Srinivas D. Nemani ,  Li-Qun Xia

IPC分类号： C23C16/00

CPC分类号： H01L21/02167 ,  C23C16/0272 ,  C23C16/325 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/314 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76832

摘要： A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials. A method is provided for depositing a silicon carbide cap layer that has substantially no phenyl groups attached to silicon atoms from a processing gas comprising an oxygen-free organosilicon compound on a low k silicon carbide barrier layer.

摘要翻译： 提供了一种处理基材的方法，包括提供包含含有苯基的有机硅化合物的处理气体至处理室，并使处理气体反应沉积在大马士革或双镶嵌中可用作阻挡层的低k碳化硅阻挡层 低k电介质材料的应用。 提供了一种用于沉积在低k碳化硅阻挡层上基本上没有从包含无氧有机硅化合物的处理气体连接到硅原子上的苯基沉积碳化硅盖层的方法。

公开(公告)号：US20090035918A1

公开(公告)日：2009-02-05

申请号：US12252260

申请日：2008-10-15

申请人： Xiaolin Chen ,  Srinivas D. Nemani ,  DongQing Li ,  Jeffrey C. Munro ,  Marlon E. Menezes

发明人： Xiaolin Chen ,  Srinivas D. Nemani ,  DongQing Li ,  Jeffrey C. Munro ,  Marlon E. Menezes

IPC分类号： H01L21/76

CPC分类号： H01L21/3105 ,  C23C16/402 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31612

摘要： Methods of forming a dielectric layer where the tensile stress of the layer is increased by a plasma treatment at an elevated position are described. In one embodiment, oxide and nitride layers are deposited on a substrate and patterned to form an opening. A trench is etched into the substrate. The substrate is transferred into a chamber suitable for dielectric deposition. A dielectric layer is deposited over the substrate, filling the trench and covering mesa regions adjacent to the trench. The substrate is raised to an elevated position above the substrate support and exposed to a plasma which increases the tensile stress of the substrate. The substrate is removed from the dielectric deposition chamber, and portions of the dielectric layer are removed so that the dielectric layer is even with the topmost portion of the nitride layer. The nitride and pad oxide layers are removed to form the STI structure.

摘要翻译： 描述了通过在升高的位置处的等离子体处理来增加层的拉伸应力的电介质层的形成方法。 在一个实施例中，将氧化物和氮化物层沉积在衬底上并图案化以形成开口。 沟槽被蚀刻到衬底中。 将基底转移到适合于电介质沉积的室中。 介电层沉积在衬底上，填充沟槽并覆盖与沟槽相邻的台面区域。 将衬底升高到衬底支撑件上方的升高位置并暴露于等离子体，这增加了衬底的拉伸应力。 从电介质沉积室取出基板，除去介质层的部分，使得介质层与氮化物层的最上部分均匀。 去除氮化物层和衬垫氧化物层以形成STI结构。

公开(公告)号：US08987139B2

公开(公告)日：2015-03-24

申请号：US14159832

申请日：2014-01-21

申请人： Chia-Ling Kao ,  Sean S. Kang ,  Srinivas D. Nemani

发明人： Chia-Ling Kao ,  Sean S. Kang ,  Srinivas D. Nemani

IPC分类号： H01L21/311 ,  H01L21/321 ,  H01L21/3213

CPC分类号： H01L21/31144 ,  H01L21/31116 ,  H01L21/321 ,  H01L21/32136 ,  H01L21/76802

摘要： Methods of patterning low-k dielectric films are described. In an example, In an embodiment, a method of patterning a low-k dielectric film involves forming and patterning a metal nitride mask layer above a low-k dielectric layer. The low-k dielectric layer is disposed above a substrate. The method also involves passivating the metal nitride mask layer by treating with a plasma based on O2/N2/SixFy. The method also involves etching a portion of the low-k dielectric layer.

摘要翻译： 描述了低k介电膜图案的方法。 在一个实施例中，在一个实施例中，图案化低k电介质膜的方法涉及在低k电介质层上形成和图案化金属氮化物掩模层。 低k电介质层设置在衬底之上。 该方法还涉及通过用基于O 2 / N 2 / SixFy的等离子体处理钝化金属氮化物掩模层。 该方法还涉及蚀刻低k电介质层的一部分。

公开(公告)号：US20140248718A1

公开(公告)日：2014-09-04

申请号：US14183257

申请日：2014-02-18

申请人： Jisoo Kim ,  Mang-mang Ling ,  Khoi Doan ,  Srinivas D. Nemani

发明人： Jisoo Kim ,  Mang-mang Ling ,  Khoi Doan ,  Srinivas D. Nemani

IPC分类号： H01L43/12

CPC分类号： H01L43/12

摘要： Chemical modification of non-volatile magnetic random access memory (MRAM) magnetic tunnel junctions (MTJs) for film stack etching is described. In an example, a method of etching a MTJ film stack includes modifying one or more layers of the MTJ film stack with a phosphorous trifluoride (PF3) source to provide modified regions of the MTJ film stack. The modified regions of the MTJ film stack are removed by a plasma etch process.

摘要翻译： 描述了用于薄膜叠层蚀刻的非易失磁性随机存取存储器（MRAM）磁隧道结（MTJ）的化学修饰。 在一个实例中，蚀刻MTJ薄膜叠层的方法包括用三氟化磷（PF 3）源修饰MTJ薄膜叠层的一层或多层以提供MTJ薄膜叠层的修饰区域。 通过等离子体蚀刻工艺去除MTJ薄膜叠层的改性区域。