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公开(公告)号：US10326089B2
公开(公告)日：2019-06-18
申请号：US15817540
申请日：2017-11-20
发明人： Yu-Dan Zhao , Yu-Jia Huo , Xiao-Yang Xiao , Ying-Cheng Wang , Tian-Fu Zhang , Yuan-Hao Jin , Qun-Qing Li , Shou-Shan Fan
IPC分类号： H01L29/745 , H01L51/05 , H01L29/786 , H01L21/285 , H01L27/12 , H01L27/32 , H01L51/00 , H01L29/51 , H03K19/094 , H01L27/06 , H01L29/778
摘要： The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.
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12.发明授权公开(公告)号：US10192930B2
公开(公告)日：2019-01-29
申请号：US15927293
申请日：2018-03-21
发明人： Yu-Dan Zhao , Qun-Qing Li , Xiao-Yang Xiao , Guan-Hong Li , Yuan-Hao Jin , Shou-Shan Fan
摘要： A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
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公开(公告)号：US20180244018A1
公开(公告)日：2018-08-30
申请号：US15961969
申请日：2018-04-25
发明人： Yuan-Hao Jin , Qun-Qing Li , Shou-Shan Fan
IPC分类号： B32B15/08 , G06F3/047 , C23F4/00 , C03C17/09 , C23C30/00 , C23C16/56 , C23C16/06 , C23C14/58 , C23C14/20 , H01B1/16 , H01B1/02 , B32B5/02
CPC分类号： B32B15/08 , B32B5/028 , B32B2307/202 , C03C17/09 , C03C2217/252 , C03C2217/253 , C03C2217/255 , C03C2218/15 , C03C2218/33 , C03C2218/34 , C23C14/20 , C23C14/5826 , C23C14/5873 , C23C16/06 , C23C16/56 , C23C30/00 , C23F4/00 , G06F3/044 , G06F3/047 , G06F2203/04103 , G06F2203/04112 , H01B1/026 , H01B1/16 , H05K1/0274 , H05K1/028 , H05K1/03 , H05K1/09 , H05K2201/026 , H05K2201/0323 , H05K2201/0364 , H05K2201/09681
摘要： The disclosure relates to a touch panel. The touch panel includes a substrate having a surface, a metal nanowire film, at least one electrode, and a conductive trace. The metal nanowire film includes a metal nanowire film. The metal nanowire film includes a number of first metal nanowire bundles parallel with and spaced from each other. Each of the number of first metal nanowire bundles includes a number of first metal nanowires parallel with each other. The first distance between adjacent two of the number of first metal nanowires is less than the second distance between adjacent two of the number of first metal nanowire bundles.
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公开(公告)号：US20180212171A1
公开(公告)日：2018-07-26
申请号：US15846213
申请日：2017-12-19
发明人： Yu-Dan Zhao , Xiao-Yang Xiao , Ying-Cheng Wang , Yuan-Hao Jin , Tian-Fu Zhang , Qun-Qing Li
CPC分类号： H01L51/0579 , H01L51/0005 , H01L51/0048
摘要： A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
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公开(公告)号：US09929302B2
公开(公告)日：2018-03-27
申请号：US15099521
申请日：2016-04-14
发明人： Yuan-Hao Jin , Qun-Qing Li , Shou-Shan Fan
IPC分类号： H01L31/18 , H01L31/0352 , H01L31/0224 , H01L31/0236 , H01L31/068
CPC分类号： H01L31/18 , H01L31/022425 , H01L31/02363 , H01L31/035209 , H01L31/068 , Y02E10/547
摘要： A solar cell is provided. The solar cell includes a silicon substrate, a back electrode, a doped silicon layer, and an upper electrode. The silicon substrate includes a first surface, a second surface, and a number of three-dimensional nano-structures located on the first surface. The three-dimensional nano-structures are located on the second surface. The three-dimensional nano-structures are linear protruding structures that are spaced from each other, and a cross section of each linear protruding structure is an arc. The doped silicon layer is attached to the three-dimensional nano-structures and the second surface between the three-dimensional nano-structures.
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公开(公告)号：US09640770B2
公开(公告)日：2017-05-02
申请号：US14985224
申请日：2015-12-30
发明人： Guan-Hong Li , Qun-Qing Li , Yuan-Hao Jin , Shou-Shan Fan
CPC分类号： H01L51/0525 , B82Y10/00 , H01L51/0048 , H01L51/0529 , H01L51/0545 , H01L51/0558
摘要： An thin film transistor includes an insulating substrate, an MgO layer, a semiconductor carbon nanotube layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer. The gate electrode is sandwiched between the insulating substrate and the MgO layer.
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公开(公告)号：US09567257B2
公开(公告)日：2017-02-14
申请号：US14967335
申请日：2015-12-13
发明人： Yuan-Hao Jin , Qun-Qing Li , Shou-Shan Fan
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , C03C17/09 , C23C14/20 , C23C14/58 , C23C16/06 , C23C16/56 , C23C30/00 , C23F4/00
CPC分类号： B32B15/08 , B32B5/028 , B32B2307/202 , C03C17/09 , C03C2217/252 , C03C2217/253 , C03C2217/255 , C03C2218/15 , C03C2218/33 , C03C2218/34 , C23C14/20 , C23C14/5826 , C23C14/5873 , C23C16/06 , C23C16/56 , C23C30/00 , C23F4/00 , G06F3/044 , G06F3/047 , G06F2203/04103 , G06F2203/04112 , H01B1/026 , H01B1/16 , H05K1/0274 , H05K1/028 , H05K1/03 , H05K1/09 , H05K2201/026 , H05K2201/0323 , H05K2201/0364 , H05K2201/09681
摘要： The disclosure relates to a method for making a metal nanowire film. The method includes applying a metal layer on a substrate; placing a carbon nanotube composite structure on the metal layer, wherein the carbon nanotube composite structure defines a number of openings and parts of the metal layer are exposed by the number of openings; dry etching the metal layer using the carbon nanotube composite structure as a mask; and removing the carbon nanotube composite structure. The carbon nanotube composite structure includes a carbon nanotube structure and a protective layer coated on the carbon nanotube structure. The carbon nanotube structure includes a number of carbon nanotubes arranged substantially along the same direction.
摘要翻译： 本公开涉及制造金属纳米线膜的方法。 该方法包括在基板上施加金属层; 在所述金属层上放置碳纳米管复合结构体，其中所述碳纳米管复合结构限定多个开口，并且所述金属层的一部分通过所述开口的数量而露出; 使用碳纳米管复合结构作为掩模来干蚀刻金属层; 并除去碳纳米管复合结构体。 碳纳米管复合结构包括碳纳米管结构和涂覆在碳纳米管结构上的保护层。 碳纳米管结构包括大致沿相同方向布置的多个碳纳米管。
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公开(公告)号：US09564594B2
公开(公告)日：2017-02-07
申请号：US14983610
申请日：2015-12-30
发明人： Guan-Hong Li , Qun-Qing Li , Yuan-Hao Jin , Shou-Shan Fan
CPC分类号： H01L51/0048 , H01L33/18 , H01L33/26 , H01L51/5092 , H01L2251/303
摘要： An light emitting diode includes an insulating substrate, a P-type semiconductor layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, and a first electrode, and a second electrode. The P-type semiconductor layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the P-type semiconductor layer. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The first electrode is electrically connected to the P-type semiconductor layer. The second electrode is electrically connected to the semiconductor carbon nanotube layer.
摘要翻译： 发光二极管包括绝缘基板，P型半导体层，半导体碳纳米管层，MgO层，功能介电层和第一电极以及第二电极。 P型半导体层位于绝缘基板上。 半导体碳纳米管层位于P型半导体层上。 MgO层位于半导体碳纳米管层上。 功能介电层覆盖MgO层。 第一电极与P型半导体层电连接。 第二电极与半导体碳纳米管层电连接。
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公开(公告)号：US20160190492A1
公开(公告)日：2016-06-30
申请号：US14985231
申请日：2015-12-30
发明人： Guan-Hong Li , Qun-Qing Li , Yuan-Hao Jin , Shou-Shan Fan
CPC分类号： H01L51/0541 , H01L51/0048 , H01L51/0096 , H01L51/0525 , H01L51/0558 , Y02E10/549
摘要： An N-type semiconductor layer includes an insulating substrate, an MgO layer, a semiconductor carbon nanotube layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer. The gate electrode is on the functional dielectric layer and insulated from the semiconductor carbon nanotube layer.
摘要翻译： N型半导体层包括绝缘基板，MgO层，半导体碳纳米管层，功能电介质层，源电极，漏电极和栅电极。 半导体碳纳米管层夹在MgO层和功能电介质层之间。 源电极和漏极电连接半导体碳纳米管层。 栅电极在功能电介质层上并与半导体碳纳米管层绝缘。
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公开(公告)号：US09263628B2
公开(公告)日：2016-02-16
申请号：US14700116
申请日：2015-04-29
发明人： Yuan-Hao Jin , Qun-Qing Li , Shou-Shan Fan
CPC分类号： H01L33/0075 , H01L33/0079 , H01L33/0095 , H01L33/20 , H01L33/22 , H01L33/24 , H01L33/405 , H01L2933/0016 , H01L2933/0083
摘要： A method for making a LED comprises following steps. A substrate having a surface is provided. A first semiconductor layer, an active layer and a second semiconductor pre-layer is formed on the surface of the substrate. A patterned mask layer is applied on a surface of the second semiconductor pre-layer. A number of three-dimensional nano-structures is formed on the second semiconductor pre-layer and the patterned mask layer is removed. The substrate is removed and a first electrode is formed on a surface of the first semiconductor layer away from the active layer. A second electrode is formed to electrically connect with the second semiconductor pre-layer.
摘要翻译： 制造LED的方法包括以下步骤。 提供具有表面的基板。 在衬底的表面上形成第一半导体层，有源层和第二半导体预层。 图案化掩模层被施加在第二半导体预层的表面上。 在第二半导体预层上形成多个三维纳米结构，并去除图案化掩模层。 去除衬底，并且第一电极形成在远离有源层的第一半导体层的表面上。 第二电极形成为与第二半导体预层电连接。
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