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公开(公告)号:US11669770B2
公开(公告)日:2023-06-06
申请号:US16203275
申请日:2018-11-28
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Zancanato , Stefano Paolo Rivolta
IPC: G06N20/00 , G01C19/00 , G01P15/00 , G06F3/0346
CPC classification number: G06N20/00 , G01C19/00 , G01P15/00 , G06F3/0346 , G06F2218/02 , G06F2218/08 , G06F2218/12
Abstract: Technological advancements are disclosed that utilize inertial sensor data associated with a device to determine a new feature array and if the new feature array is within an existing class within a state space associated with the inertial sensor data. In response to the new feature array being included in the existing class, the new feature array is added to the existing class and a representation of the existing class in the state space is updated based on the new feature array and an existing representation of the existing class. In response to the new feature array not being included in the existing class, a new class is created based on the new feature array.
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公开(公告)号:US11668585B2
公开(公告)日:2023-06-06
申请号:US17460030
申请日:2021-08-27
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Luca Guerinoni , Gabriele Gattere
CPC classification number: G01C25/005 , G01C19/726
Abstract: A gyroscopic sensor unit detects a phase drift between a demodulated output signal and demodulation signal during output of a quadrature test signal. A delay calculator detects the phase drift based on changes in the demodulated output signal during application of the quadrature test signal. A delay compensation circuit compensates for the phase drift by delaying the demodulation signal by the phase drift value.
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193.
公开(公告)号:US20230170803A1
公开(公告)日:2023-06-01
申请号:US18154167
申请日:2023-01-13
Applicant: STMicroelectronics S.r.l.
Inventor: Enrico Ferrara , Luca Morinelli
CPC classification number: H02M3/158 , H02M1/08 , H02M3/1566 , H02M1/0019
Abstract: An embodiment buck converter control circuit comprises an error amplifier configured to generate an error signal based on a feedback signal and a reference signal, a pulse generator circuit configured to generate a pulsed signal having switching cycles set to high and low as a function of the error signal, a driver circuit configured to generate a drive signal for an electronic switch of the buck converter as a function of the pulsed signal, a variable load, connected between two output terminals of the buck converter, configured to absorb a current based on a control signal, and a detector circuit configured to monitor a first signal indicative of an output current provided by the buck converter and a second signal indicative of a negative transient of the output current, and verify whether the second signal indicates a negative transient of the output current.
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194.
公开(公告)号:US20230170271A1
公开(公告)日:2023-06-01
申请号:US18056104
申请日:2022-11-16
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Valeria PUGLISI , Gabriele BELLOCCHI , Simone RASCUNA'
CPC classification number: H01L23/3178 , H01L29/1608 , H01L21/045
Abstract: An electronic device, comprising: a semiconductor body of silicon carbide; an insulating layer on a surface of the semiconductor body; a layer of metal material extending in part on the surface of the semiconductor body and in part on the insulating layer; a SiN interface layer on the layer of metal material and the insulating layer; a passivation layer on the interface layer; and an anchoring element that protrudes from the passivation layer towards the first insulating layer and extends in the first insulating layer underneath the interface layer.
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公开(公告)号:US20230168300A1
公开(公告)日:2023-06-01
申请号:US18053688
申请日:2022-11-08
Inventor: Mauro GIACOMINI , Fabio Enrico Carlo DISEGNI , Rajesh NARWAL , Pravesh Kumar SAINI , Mayankkumar HARESHBHAI NIRANJANI
IPC: G01R31/315 , H01L21/66
CPC classification number: G01R31/315 , H01L22/12
Abstract: An assembly for detecting a structural defect in a semiconductor die is provided. The assembly includes a defect-detection sensor and a microcontroller. The defect-detection sensor includes a plurality of resistive paths of electrical-conductive material in the semiconductor die, each of which has a first end and a second end and extends proximate a perimeter of the semiconductor die. The defect-detection sensor includes a plurality of signal-generation structures, each coupled to a respective resistive path and configured to supply a test signal to the resistive path. The microcontroller is configured to control the signal-generation structures to generate the test signals, acquire the test signals in each resistive paths, test an electrical feature of the resistive paths by performing an analysis of the test signals acquired and detect the presence of the structural defect in the semiconductor die based on a result of the analysis of the test signals acquired.
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公开(公告)号:US20230168290A1
公开(公告)日:2023-06-01
申请号:US17537069
申请日:2021-11-29
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Massimo ORIO
CPC classification number: G01R29/12 , G01R29/0878 , G01R29/24
Abstract: The present disclosure is directed to a device that provides high impedance contact pads for an electrostatic charge sensor. The contact pads are shared between the electrostatic charge sensor and drivers. The contact pads are set to a high impedance state by reducing current leakage through the drivers. Compared to electrostatic charge sensor with low impedance contact pads, the electrostatic charge sensor disclosed herein has high sensitivity, and is able to detect weak electrostatic fields.
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197.
公开(公告)号:US20230160024A1
公开(公告)日:2023-05-25
申请号:US17531313
申请日:2021-11-19
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Massimiliano PESATURO , Lillo RAIA , Salvatore PETRALIA , Domenico GIUSTI , Marco FERRERA
CPC classification number: C12Q1/701 , C12Q1/686 , C12Q1/6806 , B01L3/527 , B01L7/52 , B41M5/0023 , B01L2200/0647 , B01L2200/0689 , B01L2200/12 , B01L2200/16 , B01L2300/0819 , B01L2300/16
Abstract: A substrate has a plurality of microdots positioned thereon. Each microdot contains one or more primers for gene amplification for a particular target gene. The microdots are placed on the substrate and the substrate is positioned in a housing. The housing has a sample fluid to be tested introduced therein covering the microdot array. While the sample fluid is overlying the substrate, the amplification of the target gene is carried out if it is present within the sample. If the target gene that matches the primers is not present, then amplification will not take place. The fluid also contains fluorophores which will be fixed into the gene as it increases in size as it clearly detects if gene amplification has occurred by detecting the amount of light detected for a particular microdot. In a preferred embodiment, the sample fluid is placed on top of a sealing layer that is less dense then water, such as wax or mineral oil. During a heating of the sample fluid and sealing layer, the sample fluid will sink to the bottom of the sealing layer so that it is fully encased and protected.
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公开(公告)号:US11656071B2
公开(公告)日:2023-05-23
申请号:US17237844
申请日:2021-04-22
Applicant: STMicroelectronics S.r.l.
Inventor: Federico Rizzardini , Stefano Paolo Rivolta , Lorenzo Bracco , Marco Bianco
CPC classification number: G01B7/30 , G01D5/16 , G01D18/00 , G05B17/02 , G06F1/1616
Abstract: A method is provided for controlling an electronic apparatus on the basis of a value of a lid angle between a first hardware element accommodating a first magnetometer and a second hardware element accommodating a second magnetometer. The method includes acquiring, through the magnetometers, first signals representing an orientation of the hardware elements. A calibration parameter indicative of a condition of calibration of the magnetometers is generated on the basis of the first signals. A reliability value indicative of a condition of reliability of the first signals is generated on the basis of the first signals. A first intermediate value of the lid angle is calculated on the basis of the first signals. A current value of the lid angle is calculated on the basis of the calibration parameter, of the reliability value, and of the first intermediate value, and the electronic apparatus is controlled on the basis of the current value.
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公开(公告)号:US11652479B2
公开(公告)日:2023-05-16
申请号:US17659226
申请日:2022-04-14
Applicant: STMicroelectronics S.r.l.
Inventor: Giuseppe Maiocchi , Ezio Galbiati , Michele Boscolo Berto , Maurizio Ricci
IPC: H03K17/687 , H02M3/157 , H02M1/00
CPC classification number: H03K17/6877 , H02M1/0025 , H02M3/157 , H03K17/6874
Abstract: A method of controlling a half-bridge circuit includes receiving an analog feedback signal proportional to an output of the half-bridge circuit, comparing the received analog feedback signal with a threshold value, selecting a digital feedback signal based on a result of the comparing, comparing the digital feedback signal with a digital reference signal to generate a digital error signal, integrating the digital error signal to generate an integration error signal, downscaling the integral error signal to generate a downscaled integration signal, sampling the downscaled integration signal to generate a sampled integration signal, and generating pulsed signals from the sampled integration signal to provide an input to the half-bridge circuit.
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公开(公告)号:US11644504B2
公开(公告)日:2023-05-09
申请号:US16791020
申请日:2020-02-14
Applicant: STMicroelectronics S.r.l.
Inventor: Mirko Dondini , Daniele Mangano , Salvatore Pisasale
IPC: G01R31/3185 , G01R29/027 , G01R31/319 , G06F1/08 , G06F1/12 , G06F13/24
CPC classification number: G01R31/318552 , G01R29/0273 , G01R31/31922 , G01R31/318594 , G06F1/08 , G06F1/12 , G06F13/24
Abstract: In accordance with an embodiment, a system includes an oscillator equipped circuit having an oscillator control circuit configured to be coupled to an external oscillator and a processing unit comprising a clock controller. The clock controller includes an interface circuit configured to exchange handshake signals with the oscillator control circuit, a security circuit configured to receive the external oscillator clock signal and configured to select the external oscillator clock signal as the system clock, and a detection block configured to detect a failure in the external oscillator clock signal. Upon detection of the failure, a different clock signal is selected as the system clock and the interface circuit to interrupts a propagation of the external oscillator.
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