公开(公告)号：US09866136B2

公开(公告)日：2018-01-09

申请号：US14100463

申请日：2013-12-09

Applicant: Analog Devices Global

Inventor： Jun Duan ,  Liuqing Yang ,  Xudong Huang ,  Zhijie Zhu ,  Renjian Xie

IPC: H02M3/335 ,  H02M3/337

CPC classification number: H02M3/337 ,  H02M3/33569 ,  H02M3/33592 ,  Y02B70/1475

Abstract: A power converter can include an electrical isolation circuit between input and output nodes. An input signal monitor node can be provided, such as on a converter output side of the isolation circuit. In an example, a peak detection circuit can be coupled to the input signal monitor node. The output node of the power converter can be configured to supply an output power signal that is a function of an input signal at the input node. The power converter can include multiple, independently-switchable switches at one or more of the input and output sides of the isolation circuit. In an example, the power converter with the input signal monitor node can be configured as a bias supply to provide power, at the output node, to a controller circuit for a main stage power converter circuit.

公开(公告)号：US09859878B2

公开(公告)日：2018-01-02

申请号：US14517639

申请日：2014-10-17

Applicant: Analog Devices Global

Inventor： Colin G. Lyden ,  Donal Bourke

IPC: H03K5/003 ,  G01N27/02 ,  G01N27/327 ,  H03H11/24

CPC classification number: H03K5/003 ,  G01N27/028 ,  G01N27/3273 ,  H03H11/24

Abstract: A control circuit for use with a four terminal sensor, such as a glucose sensor. The Glucose sensor is a volume product and typically its manufacture will want to make it as inexpensively as possible. This may give rise to variable impedances surrounding the active cell of the sensor. Typically the sensor has first and second drive terminals and first and second measurement terminals, so as to help overcome the impedance problem. The control circuit is arranged to drive at least one of the first and second drive terminals with an excitation signal, and control the excitation signal such that a voltage difference between the first and second measurement terminals is within a target range of voltages. To allow the control circuit to work with a variety of measurement cell types the control circuit further comprises voltage level shifters for adjusting a voltage at one or both of the drive terminals, or for adjusting a voltage received from one or both of the measurement terminals.

公开(公告)号：US09859803B2

公开(公告)日：2018-01-02

申请号：US13868459

申请日：2013-04-23

Applicant: Analog Devices Global

Inventor： Bernhard Strzalkowski

IPC: H02M3/335

CPC classification number: H02M3/33584

Abstract: A transformer based isolated bi-directional DC-DC power converter may have signals for controlling power transfer in first and second directions are derived from the same side of the transformer. The converter may include a transformer, a first switching circuit, a second switching circuit, and a controller. In a first mode, the controller controls the first and second switching circuits, and power is transferred from a first side to a second side. In a second mode, the controller controls the first and second switching circuits, and power is transferred from the second side to the first side.

公开(公告)号：US20170366876A1

公开(公告)日：2017-12-21

申请号：US15622607

申请日：2017-06-14

Applicant: Analog Devices Global

Inventor： Vinayak Agrawal ,  Gaurav Gupta ,  John Cleary ,  Ken M. Feen

IPC: H04Q9/00 ,  H04Q11/00 ,  H04L25/02

CPC classification number: H04Q9/00 ,  G06K9/0002 ,  H04L25/0272 ,  H04Q11/00

Abstract: Aspects of the embodiments are directed an analog front end circuit (AFE circuit), the AFE circuit including a beamforming circuit configured to receive as an input a plurality of receiver inputs, the receiver inputs coupled to a sensor element. The beamforming circuit can include a plurality of receiver sub-circuits, each sub-circuit including a digital-to-analog converter, a low noise amplifier, and an I/Q mixer circuit element; an adder circuit element at an output of the I/Q mixer circuit element; and a multiplexer coupled to an output of the adder circuit. The AFE can be part of a current sensing device. The current sensing device can include a two-dimensional array of sensor elements.

公开(公告)号：US20170359041A1

公开(公告)日：2017-12-14

申请号：US15178217

申请日：2016-06-09

Applicant: Analog Devices Global

Inventor： Sean T. Morley

IPC: H03F3/45 ,  H03F3/21 ,  H03F3/19 ,  H03F3/193

CPC classification number: H03F3/45273 ,  H03F1/3211 ,  H03F3/19 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F3/3016 ,  H03F3/45071 ,  H03F3/4508 ,  H03F3/45085 ,  H03F3/45174 ,  H03F3/45183 ,  H03F3/50 ,  H03F2200/165 ,  H03F2200/451 ,  H03F2200/456 ,  H03F2200/513 ,  H03F2200/69 ,  H03F2200/72 ,  H03F2200/75 ,  H03F2203/45112 ,  H03F2203/45646

Abstract: Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.

公开(公告)号：US20170351284A1

公开(公告)日：2017-12-07

申请号：US15175376

申请日：2016-06-07

Applicant: Analog Devices Global

Inventor： Celal Avci ,  Tarik Cavus ,  Savas Tokmak ,  Yalcin Alper Eken

IPC: G05F1/575

CPC classification number: G05F1/575

Abstract: Apparatus and methods for assisting a voltage regulator. In an example, a voltage regulator can include an error amplifier configured to compare a reference voltage with a representation of an output voltage of the voltage regulator, an output transistor coupled to a supply voltage and configured to receive an output of the error amplifier and to provide the output voltage, and an auxiliary-current circuit including a helper transistor having a terminal coupled to the output voltage, the helper transistor configured to turn on when the output voltage drops due to current demand from the load and to provide charge current to the load in addition to current provided by the output transistor.

公开(公告)号：US20170323879A1

公开(公告)日：2017-11-09

申请号：US15149079

申请日：2016-05-06

Applicant: ANALOG DEVICES GLOBAL

Inventor： John Twomey ,  Brian Sweeney ,  Brian B. Moane

IPC: H01L27/02 ,  H03K5/08 ,  H01L29/78 ,  H03K17/687

CPC classification number: H01L27/0255 ,  H01L29/7802 ,  H01L29/7816 ,  H03K5/08 ,  H03K17/102 ,  H03K17/6871 ,  H03K17/6874

Abstract: A bus driver is provided that can withstand over voltages being applied to its output terminal without the protection circuit detracting from the voltage swing that can be provided by the driver. The circuit arrangement also allows transistors having good on state resistance and large tolerance of drain-to-source voltages to be used.

公开(公告)号：US20170317070A1

公开(公告)日：2017-11-02

申请号：US15142453

申请日：2016-04-29

Applicant: Analog Devices Global

Inventor： Javier Alejandro Salcedo ,  David J. Clarke

IPC: H01L27/02 ,  H04B1/40 ,  H01L23/532 ,  H01L23/552 ,  H01L23/00 ,  H01L25/18 ,  H01L27/06 ,  H01L29/06 ,  H01L29/73 ,  H01L23/495 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L27/0262 ,  H01L23/49541 ,  H01L23/5228 ,  H01L23/528 ,  H01L23/53271 ,  H01L23/552 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/18 ,  H01L27/0255 ,  H01L27/0647 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/0692 ,  H01L29/73 ,  H01L29/861 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49105 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/1203 ,  H01L2924/12036 ,  H01L2924/1207 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/1426 ,  H01L2924/3025 ,  H04B1/40 ,  H01L2924/00

Abstract: An integrated circuit device for protecting circuits from transient electrical events is disclosed. An integrated circuit device includes a semiconductor substrate having formed therein a bidirectional semiconductor rectifier (SCR) having a cathode/anode electrically connected to a first terminal and an anode/cathode electrically connected to a second terminal. The integrated circuit device additionally includes a plurality of metallization levels formed above the semiconductor substrate. The integrated circuit device further includes a triggering device formed in the semiconductor substrate on a first side and adjacent to the bidirectional SCR. The triggering device includes one or more of a bipolar junction transistor (BJT) or an avalanche PN diode, where a first device terminal of the triggering device is commonly connected to the T1 with the K/A, and where a second device terminal of the triggering device is electrically connected to a central region of the bidirectional SCR through one or more of the metallization levels.

公开(公告)号：US09806734B1

公开(公告)日：2017-10-31

申请号：US15343361

申请日：2016-11-04

Applicant: Analog Devices Global

Inventor： Arvind Madan ,  Sandeep Monangi

IPC: H03M1/34 ,  H03M1/12 ,  H03M1/46

CPC classification number: H03M1/1245 ,  H03M1/0624 ,  H03M1/46

Abstract: A successive approximation routine (SAR) analog-to-digital converter integrated circuit can include multiple analog-to-digital converters (ADCs) sharing a reference voltage that can be perturbed by a capacitor array of a digital-to-analog converter (DAC) sampling the reference voltage, which can limit conversion accuracy. Synchronizing every bit trial across the ADCs can improve accuracy but can slow the conversion. Synchronizing a subset of at least one, but fewer than N, bit trials across ADCs can help obtain both speed and robustness. This selected subset can include bit trials corresponding to pro-defined critical events, such as those events for which a stable reference voltage node is particularly desirable.

公开(公告)号：US09800262B1

公开(公告)日：2017-10-24

申请号：US15258910

申请日：2016-09-07

Applicant: Analog Devices Global

Inventor： Roberto Sergio Matteo Maurino ,  Sanjay Rajasekhar ,  Pasquale Delizia ,  Colin G. Lyden ,  Gabriel Banarie

IPC: H03M3/00 ,  H03M1/08

CPC classification number: H03M3/464 ,  H03M1/08 ,  H03M3/34 ,  H03M3/452

Abstract: A sigma delta analog-to-digital converter (ADC) circuit comprises a capacitive gain amplifier circuit having a first input to receive an input voltage and a second input; a loop filter circuit connected to an output of the capacitive gain amplifier circuit; a sub-ADC circuit including an output and an input connected to an output of the loop filter circuit; and a digital-to-analog (DAC) circuit including a DAC input connected to the output of the sub-ADC circuit, and a DAC output connected to the second input of the capacitive gain amplifier.