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公开(公告)号：US09800260B1
公开(公告)日：2017-10-24
申请号：US15343674
申请日：2016-11-04
Applicant: Analog Devices Global
Inventor： Debopam Banerjee
CPC classification number: H03M3/412 , H03M1/124 , H03M3/452 , H03M3/454 , H03M3/458 , H03M3/488 , H04B1/0017 , H04B1/38
Abstract: An apparatus comprises a delta-sigma analog-to-digital converter (ADC) and baseband processing circuitry. The delta-sigma ADC includes a plurality of integrator stages connected in series, including a first integrator stage operatively coupled to an input of the delta-sigma ADC; a main quantizer circuit including a main ADC circuit and a main digital-to-analog converter (DAC) circuit, wherein an input to the main ADC circuit is operatively coupled to the plurality of integrator stages; and a first feedback circuit path operatively coupled from an output of the first integrator stage to the input of the delta-sigma ADC, wherein the first feedback circuit path is configured to subtract an output voltage of the first integrator stage from the input of the delta-sigma ADC. The baseband circuitry is configured to activate the first feedback circuit path when detecting that the input voltage increases to cause distortion in the delta-sigma ADC.
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公开(公告)号：US09791480B2
公开(公告)日：2017-10-17
申请号：US13899143
申请日：2013-05-21
Applicant: ANALOG DEVICES GLOBAL
Inventor： Song Qin
CPC classification number: G01R19/0092 , H02M3/158 , H02M2001/0009
Abstract: Apparatus and methods for current sensing in switching regulators include a current sensing circuit to sense current of a power stage of a power converter. The power converter can include first and second transistors. The current sensing circuit comprises a transistor that is a scaled version of one of the transistors of the power converter. A circuit of the current sensing circuit matches a drain-to-source voltage of the transistor of the current sensing circuit to the corresponding transistor of the power converter. A current mirror generates a current that mirrors the current flowing through the transistor of the current sensing circuit. A first resistor converts the mirrored current to a current sensed signal.
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公开(公告)号：US20170264422A1
公开(公告)日：2017-09-14
申请号：US15605082
申请日：2017-05-25
Applicant: Analog Devices Global
Inventor： Muhammad Kalimuddin Khan , Kenneth J. Mulvaney , Philip P.E. Quinlan , Shane O'Mahony
CPC classification number: H04L7/0008 , H04L7/033 , H04L7/0331 , H04L7/046
Abstract: An apparatus comprising: a signal detection circuit determine a count reached by a counter between successive detected edge signals and to provide an indication of whether successive detected edge signals are separated from each other by at least a prescribed time interval; a clock circuit that produces clock signal pulses in response to a provided indication of an occurrence of a succession of detected edge signals each separated from a previous edge signal of the succession by at least the prescribed time interval; phase matching circuitry configured to align the produced clock signal pulses with detected edge signals; and a pattern matching circuit that that samples a sequence of detected edge signals aligned with the produced clock signal pulses to detect a data packet.
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公开(公告)号：US20170255221A1
公开(公告)日：2017-09-07
申请号：US15464056
申请日：2017-03-20
Applicant: Analog Devices Global
Inventor： Stefan Marinca , Gabriel Banarie
Abstract: The present disclosure relates to a method and apparatus for generating a voltage reference. More particularly the present disclosure relates to a methodology and circuitry configured to provide an output signal that combines a proportional to absolute temperature component with a complimentary to absolute temperature component to generate a stable output which is not temperature dependent.
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公开(公告)号：US20170250682A1
公开(公告)日：2017-08-31
申请号：US15226564
申请日：2016-08-02
Applicant: Analog Devices Global
Inventor： Miguel Ángel Fernández Robayna
CPC classification number: H03K5/007 , H04B1/04 , H04B3/00 , H04L25/0266 , H04L25/085
Abstract: A circuit for compensation of baseline voltage wander operating at an input of an isolator is disclosed. The circuit can compensate electronically the frequency response of an isolation circuit (e.g., a transformer) by increasing the pass band in the low frequency region in order to minimize the baseline wander caused by low inductance windings. The compensation circuit can be used to inject a current ramp proportional to the amplitude and the duration of the pulse and inversely proportional to the open circuit inductance of the isolation circuit.
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Patent Agency Ranking
公开(公告)号：US09749125B2
公开(公告)日：2017-08-29
申请号：US14568818
申请日：2014-12-12
Applicant: Analog Devices Global
Inventor： Muhammad Kalimuddin Khan , Kenneth J. Mulvaney
Abstract: A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.
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公开(公告)号：US09748048B2
公开(公告)日：2017-08-29
申请号：US14262188
申请日：2014-04-25
Applicant: Analog Devices Global
Inventor： Padraig L. Fitzgerald , Jo-ey Wong , Raymond C. Goggin , Bernard P. Stenson , Paul Lambkin , Mark Schirmer
CPC classification number: H01H1/0036 , H01H59/0009 , H01H2001/0084 , H01H2059/0018 , H01H2059/0072
Abstract: Several features are disclosed that improve the operating performance of MEMS switches such that they exhibit improved in-service life and better control over switching on and off.
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公开(公告)号：US09735741B2
公开(公告)日：2017-08-15
申请号：US14472243
申请日：2014-08-28
Applicant: Analog Devices Global
Inventor： Patrick Joseph Pratt , Ronald D. Turner , Joseph B. Brannon
CPC classification number: H03F1/3247 , H03F1/3258 , H03F3/19 , H03F3/195 , H03F3/21 , H03F3/245 , H03F2200/451 , H03F2201/3215 , H03F2201/3233
Abstract: Aspects of this disclosure relate to a receiver for digital predistortion (DPD). The receiver includes an analog-to-digital converter (ADC) having a sampling rate that is lower than a signal bandwidth of an output of a circuit having an input that is predistorted by DPD. DPD can be updated based on feedback from the receiver. According to certain embodiments, the receiver can be a narrowband receiver configured to observe sub-bands of the signal bandwidth. In some other embodiments, the receiver can include a sub-Nyquist ADC.
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239.发明申请公开(公告)号：US20170169929A1
公开(公告)日：2017-06-15
申请号：US14967059
申请日：2015-12-11
Applicant: ANALOG DEVICES GLOBAL
Inventor： Jan Kubik
CPC classification number: H01F27/2804 , H01F17/0013 , H01F27/24 , H01F41/041 , H01F41/046 , H01F2017/0066 , H01F2027/2809
Abstract: Inductive components, such as transformers, can be improved by the inclusion of a magnetic core. However, the benefit of having a core is lost if the core enters magnetic saturation. One way to avoid saturation is to provide a bigger core, but this is costly in the context of integrated electronic circuits. The inventor realized that the magnetic flux density varies with position in a magnetic core within certain integrated circuits, causing parts of the magnetic core to saturate earlier than other parts. This reduces the ultimate performance of the magnetic core. This disclosure provides structures that delay the onset of early saturation, which can, for example, enable a transformer to handle more power.
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公开(公告)号：US09680386B2
公开(公告)日：2017-06-13
申请号：US14529430
申请日：2014-10-31
Applicant: Analog Devices Global
Inventor： Renjian Xie , Yingyang Ou
CPC classification number: H02M3/33592 , H02M3/3376 , H02M2001/342 , Y02B70/1475 , Y02B70/1491
Abstract: This application provides methods and apparatus for controlling aspects of a synchronous rectifier power converter. In an example, an apparatus can include a minimum duty cycle control circuit configured to receive first control signals for one or more switches associated with the synchronous rectifier power converter, to compare a duty cycle of the first control signals to a minimum duty cycle threshold, and to provide second control signals having at least the minimum duty cycle for an active snubber switch of the synchronous rectifier power converter.
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