公开(公告)号：US20160087541A1

公开(公告)日：2016-03-24

申请号：US14529430

申请日：2014-10-31

Applicant: Analog Devices Global

Inventor： Renjian Xie ,  Yingyang Ou

IPC: H02M3/335

CPC classification number: H02M3/33592 ,  H02M3/3376 ,  H02M2001/342 ,  Y02B70/1475 ,  Y02B70/1491

Abstract: This application provides methods and apparatus for controlling aspects of a synchronous rectifier power converter. In an example, an apparatus can include a minimum duty cycle control circuit configured to receive first control signals for one or more switches associated with the synchronous rectifier power converter, to compare a duty cycle of the first control signals to a minimum duty cycle threshold, and to provide second control signals having at least the minimum duty cycle for an active snubber switch of the synchronous rectifier power converter.

Abstract translation: 本申请提供了用于控制同步整流器功率转换器的方面的方法和装置。 在一个示例中，装置可以包括最小占空比控制电路，其被配置为接收与同步整流器功率转换器相关联的一个或多个开关的第一控制信号，以将第一控制信号的占空比与最小占空比阈值进行比较， 并且提供对于同步整流器功率转换器的有源缓冲开关至少具有最小占空比的第二控制信号。

公开(公告)号：US09258659B2

公开(公告)日：2016-02-09

申请号：US13948663

申请日：2013-07-23

Applicant: ANALOG DEVICES GLOBAL

Inventor： Yang Pan ,  Fanjiong Zhang ,  Kim Spetzler Berthelsen ,  Michael W. Determan

IPC: H04R29/00 ,  H04R3/00 ,  H04R3/08

CPC classification number: H04R29/001 ,  H04R3/007 ,  H04R3/08

Abstract: A method of detecting enclosure leakage of an electrodynamic loudspeaker mounted in an enclosure or box may include applying an audio signal to a voice coil of the electrodynamic loudspeaker through an output amplifier and detecting a voice coil current flowing into the voice coil. A voltage across the voice coil may be detected and an impedance or admittance of the loudspeaker across a predetermined audio frequency range may be detected based on the detected voice coil current and voice coil voltage. A fundamental resonance frequency of the loudspeaker may be determined based on the detected impedance or admittance and compared with a nominal fundamental resonance frequency of the loudspeaker representing a sealed state of the enclosure. Acoustic leakage of the enclosure may be detected based on a deviation between the determined the fundamental resonance frequency and the nominal fundamental resonance frequency of the electrodynamic loudspeaker.

Abstract translation: 检测安装在外壳或盒中的电动扬声器的机壳泄漏的方法可以包括通过输出放大器将音频信号施加到电动扬声器的音圈并检测流入音圈的音圈电流。 可以检测音圈两端的电压，并且可以基于检测到的音圈电流和音圈电压来检测扬声器在预定音频范围内的阻抗或导纳。 扬声器的基本共振频率可以基于检测到的阻抗或导纳来确定，并与表示封装的密封状态的扬声器的标称基本共振频率进行比较。 可以基于确定的基本共振频率和电动扬声器的标称基本共振频率之间的偏差来检测外壳的声学泄漏。

公开(公告)号：US09202934B2

公开(公告)日：2015-12-01

申请号：US14055738

申请日：2013-10-16

Applicant: ANALOG DEVICES GLOBAL

Inventor： Edward John Coyne

IPC: H01L29/80 ,  H01L31/112 ,  H01L29/808 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/808 ,  H01L29/0843 ,  H01L29/1058 ,  H01L29/66893 ,  H01L29/66901

Abstract: A method of forming a junction field effect transistor, the transistor comprising: a back gate; a channel; a top gate; a drain and a source in current flow with the channel; wherein the method comprises selecting a first channel dimension between the top gate and the back gate such that a significant current flow path in the channel occurs in a region of relatively low electric field strength.

Abstract translation: 一种形成结型场效应晶体管的方法，所述晶体管包括：背栅极; 一个渠道 顶门 电流与通道的漏极和源极; 其中所述方法包括选择所述顶栅极和所述后栅极之间的第一沟道尺寸，使得所述沟道中的有效电流流动路径发生在相对低的电场强度的区域中。

公开(公告)号：US20150341161A1

公开(公告)日：2015-11-26

申请号：US14285415

申请日：2014-05-22

Applicant: Analog Devices Global

Inventor： Muhammad Kalimuddin Khan ,  Philip E. Quinlan ,  Kenneth J. Mulvaney

IPC: H04L7/033 ,  H04L27/10

CPC classification number: H04L7/033 ,  H04L7/0083 ,  H04L7/046 ,  H04L7/10 ,  H04L27/0008 ,  H04L27/10 ,  H04L27/106

Abstract: Apparatus and method for acquiring and tracking a data signal are disclosed. Two different CDR circuits are configured to acquire and track data based on two different modulation schemes. While in the acquisition mode, the first CDR circuit may acquire data signal by sampling the signal at a reduced clock rate and handover to the second CDR circuit when a preamble is found. Also in the acquisition mode, the data acquisition and tracking circuit may determine the power level of the preamble signal and dynamically adjust the threshold level for the tracking period upon finding of the preamble.

Abstract translation: 公开了用于获取和跟踪数据信号的装置和方法。 两个不同的CDR电路被配置为基于两种不同的调制方案来获取和跟踪数据。 在采集模式中，第一CDR电路可以通过以降低的时钟速率对信号进行采样来获得数据信号，并且当发现前导码时切换到第二CDR电路。 同样在采集模式中，数据采集和跟踪电路可以确定前导码信号的功率电平，并且在寻找前导码时动态地调整跟踪周期的阈值电平。

公开(公告)号：US20150326193A1

公开(公告)日：2015-11-12

申请号：US14274258

申请日：2014-05-09

Applicant: ANALOG DEVICES GLOBAL

Inventor： Roberto S. Maurino

IPC: H03F3/45 ,  H03F1/26

CPC classification number: H03F3/45076 ,  H03F1/26 ,  H03F3/211 ,  H03F3/393 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/234 ,  H03F2200/411 ,  H03F2200/555 ,  H03F2203/45116 ,  H03F2203/45212 ,  H03F2203/45366 ,  H03F2203/45471 ,  H03F2203/45562 ,  H03F2203/45644 ,  H03F2203/45674

Abstract: An amplifier input stage comprising first and second p-type transistors, wherein sources of the first and second p-type transistors are connected to a first node, a drain of the first p-type transistor is connected to a first output of the amplifier input stage, a drain of the second p-type transistor is connected to a second output of the amplifier input stage, a gate of the first p-type transistor is configured to receive a first signal of an input stage differential input signal and a gate of the second p-type transistor is configured to receive a second signal of the input stage differential input signal; first and second n-type transistors, wherein sources of the first and second n-type transistors are connected to a second node, a drain of the first n-type transistor is connected to a third output of the amplifier input stage, a drain of the second n-type transistor is connected to a fourth output of the amplifier input stage, a gate of the first n-type transistor is configured to receive the first signal of the input stage differential input signal and a gate of the second n-type transistor is configured to receive the second signal of the input stage differential input signal; a first circuit arranged to provide a first portion of a first bias current to the first node; and a second circuit arranged to draw a second portion of the first bias current from the second node; wherein the first and second portions are determined by a first signal of an amplifier input signal.

Abstract translation: 放大器输入级包括第一和第二p型晶体管，其中第一和第二p型晶体管的源极连接到第一节点，第一p型晶体管的漏极连接到放大器输入端的第一输出端 第二p型晶体管的漏极连接到放大器输入级的第二输出，第一p型晶体管的栅极被配置为接收输入级差分输入信号的第一信号和第 第二p型晶体管被配置为接收输入级差分输入信号的第二信号; 第一和第二n型晶体管，其中第一和第二n型晶体管的源极连接到第二节点，第一n型晶体管的漏极连接到放大器输入级的第三输出端，漏极 第二n型晶体管连接到放大器输入级的第四输出端，第一n型晶体管的栅极被配置为接收输入级差分输入信号的第一信号和第二n型晶体管的栅极 晶体管被配置为接收输入级差分输入信号的第二信号; 第一电路，被布置成向第一节点提供第一偏置电流的第一部分; 以及第二电路，布置成从所述第二节点绘制所述第一偏置电流的第二部分; 其中第一和第二部分由放大器输入信号的第一信号确定。

公开(公告)号：US09160356B1

公开(公告)日：2015-10-13

申请号：US14334545

申请日：2014-07-17

Applicant: Analog Devices Global

Inventor： Niall Kevin Kearney ,  Keith O'Donoghue ,  Hongxing Li

IPC: H03M1/10

CPC classification number: H03M3/386 ,  H03M3/40 ,  H03M3/424 ,  H03M3/452

Abstract: An analog to digital convertor (ADC) comprises an integrator having an input selectively connected to an intermediate frequency (IF) signal input and an output connected to a summer. The summer has an output connected to an input of a quantizer, the quantizer output being operatively connected to a signal strength indicator. The integrator includes a programmable gain feedback component. The summer has a synthesized calibration signal input, the value of the programmable gain feedback component being configured to vary when a synthesized calibration signal at the intermediate frequency is applied to the summer. The signal strength indicator is configured to detect a value of the programmable gain feedback component when the signal strength is minimized and to calibrate the ADC accordingly.

Abstract translation: 模数转换器（ADC）包括积分器，其具有选择性地连接到中频（IF）信号输入的输入端和连接到夏季的输出。 夏季具有连接到量化器的输入的输出，量化器输出可操作地连接到信号强度指示器。 积分器包括可编程增益反馈分量。 夏季具有合成的校准信号输入，可编程增益反馈分量的值被配置为当将中频处的合成校准信号施加到夏季时变化。 信号强度指示器被配置为当信号强度最小化时检测可编程增益反馈分量的值，并相应地校准ADC。

公开(公告)号：US09151818B2

公开(公告)日：2015-10-06

申请号：US13672236

申请日：2012-11-08

Applicant: Analog Devices Global

Inventor： Seyed Amir Ali Danesh ,  Jonathan Ephraim David Hurwitz

IPC: G01R27/08 ,  G01R19/00 ,  G01R35/04 ,  G01R21/133 ,  G01R21/14 ,  G01R15/04 ,  G01R19/02

CPC classification number: G01R35/04 ,  G01R15/04 ,  G01R19/0084 ,  G01R19/02 ,  G01R21/133 ,  G01R21/14

Abstract: A voltage measurement apparatus is provided that includes: a potential attenuator configured to be electrically connected between first and second conductors, which are electrically coupled to a source, wherein the potential attenuator includes a first impedance and a reference impedance arrangement in series with each other, wherein the reference impedance arrangement has an electrical characteristic that can be changed in a known fashion; and further including a processing arrangement configured to acquire at least one signal from the reference impedance arrangement, the at least one signal reflecting change of the electrical characteristic in the known fashion; and to determine a voltage between the first and second conductors in dependence on the fashion in which the electrical characteristic is changed being known and the at least one signal.

Abstract translation: 提供一种电压测量装置，其包括：电位衰减器，被配置为电连接在第一和第二导体之间，所述第一和第二导体电耦合到源极，其中所述电位衰减器包括彼此串联的第一阻抗和参考阻抗布置， 其中所述参考阻抗布置具有可以以已知方式改变的电特性; 并且还包括配置成从所述参考阻抗布置获取至少一个信号的处理装置，所述至少一个信号以已知方式反映电特性的变化; 并且根据已知电特性改变的方式和至少一个信号来确定第一和第二导体之间的电压。

公开(公告)号：US20150235779A1

公开(公告)日：2015-08-20

申请号：US14182839

申请日：2014-02-18

Applicant: Analog Devices Global

Inventor： Check F. Lee ,  Raymond C. Goggin ,  Padraig L. Fitzgerald

IPC: H01H1/00 ,  B81C1/00 ,  H01H59/00 ,  B81B7/00

CPC classification number: H01H1/0036 ,  B81B7/0064 ,  B81B2201/014 ,  B81B2207/03 ,  B81B2207/07 ,  B81B2207/115 ,  B81C1/00698 ,  B81C2201/0171 ,  B81C2203/075 ,  H01H59/0009 ,  H01P1/127

Abstract: A MEMS apparatus has a substrate, an input node, an output node, and a MEMS switch between the input node and the output node. The switch selectively connects the input node and the output node, which are electrically isolated when the switch is open. The apparatus also has an input doped region in the substrate and an output doped region in the substrate. The input doped region and output doped region are electrically isolated through the substrate—i.e., the resistance between them inhibits non-negligible current flows between the two doped regions. The input doped region forms an input capacitance with the input node, while the output doped region forms an output capacitance with the output node.

Abstract translation: MEMS装置在输入节点和输出节点之间具有衬底，输入节点，输出节点和MEMS开关。 开关选择性地连接输入节点和输出节点，当开关打开时，输出节点和输出节点电隔离。 该装置还具有衬底中的输入掺杂区域和衬底中的输出掺杂区域。 输入掺杂区域和输出掺杂区域通过衬底电隔离，即它们之间的电阻在两个掺杂区域之间抑制不可忽略的电流。 输入掺杂区域与输入节点形成输入电容，而输出掺杂区域与输出节点形成输出电容。

公开(公告)号：US20150070200A1

公开(公告)日：2015-03-12

申请号：US14537532

申请日：2014-11-10

Applicant: ANALOG DEVICES GLOBAL

Inventor： Zhao Li ,  SHIPRA BHAL ,  KEVIN GLENN GARD ,  DAVID NELSON ALLDRED ,  CHRISTOPHER MAYER ,  TREVOR CLIFFORD CALDWELL ,  DAVID J. McLAURIN ,  VICTOR KOZLOV

IPC: H03M3/00 ,  H03M1/10

CPC classification number: H03M3/384 ,  H03M1/00 ,  H03M1/1009 ,  H03M1/12 ,  H03M3/458

Abstract: A calibration system for an analog-to-digital converter (ADC) an internal ADC that receives an analog input and converts the analog input to digital multi-bit data. The calibration system also includes a reference shuffling circuit that shuffles reference values of comparators of the internal ADC. Further, the calibration system includes a calibration circuit that calibrates the comparators of the internal ADC. The calibration system includes a digital block that measures an amplitude based on the digital multi-bit data. Additionally, the calibration system includes calibration logic that controls the calibration circuit based on an output of the digital block.

Abstract translation: 用于模数转换器（ADC）的校准系统，内部ADC接收模拟输入并将模拟输入转换为数字多位数据。 该校准系统还包括一个参考混洗电路，它洗牌内部ADC的比较器参考值。 此外，校准系统包括校准电路，校准内部ADC的比较器。 校准系统包括基于数字多位数据测量幅度的数字块。 此外，校准系统包括基于数字块的输出来控制校准电路的校准逻辑。

公开(公告)号：US11450469B2

公开(公告)日：2022-09-20

申请号：US16553954

申请日：2019-08-28

Applicant: Analog Devices Global Unlimited Company

Inventor： Paul Lambkin ,  Patrick J. Murphy ,  Bernard Patrick Stenson ,  Laurence B. O'Sullivan ,  Stephen O'Brien ,  Shane Geary ,  Baoxing Chen ,  Sombel Diaham

IPC: H01F19/08 ,  H04B1/04 ,  H04B1/16 ,  H01G2/00

Abstract: A micro-isolator is described. The micro-isolator may include a first isolator element, a second isolator element, and a first dielectric material separating the first isolator element from the second isolator element. A second dielectric material may completely or partly encapsulate the second isolator element, or may be present at outer corners of the second isolator element. The second dielectric material may have a larger bandgap than the first dielectric material, and its configuration may reduce electrostatic charge injection into the first dielectric material. The micro-isolator may be formed using microfabrication techniques.