Abstract:
A semiconductor device may include a substrate and a through electrode. The substrate may have a first surface and a second surface opposite to the first surface, the substrate including circuit patterns formed on the first surface. The through electrode penetrates the substrate and may be electrically connected to the circuit pattern, the through electrode including a first plug that extends from the first surface in a thickness direction of the substrate and a second plug that extends from the second surface in the thickness direction of the substrate so as to be connected to the first plug.
Abstract:
A semiconductor chip comprises a substrate including a front surface and a rear surface, the substrate having a first via hole formed in the front surface and a second via hole formed in the rear surface, a first conductive plug formed on the substrate, the first conductive plug including a first portion formed in the first via hole and a second portion protruding from the front surface of the substrate, and a second conductive plug formed on the first conductive plug, the second conductive plug having a smaller cross-sectional area than the first conductive plug.
Abstract:
Disclosed is an effective high-speed encoding method using a parity-check matrix proposed in an IEEE 802.1x standard for high-speed low-density parity-check encoding. In the prior art, encoding was performed by blocking and dividing the parity-check matrix of the LDPC code and through relevant matrix equations, or encoding was performed by an encoding apparatus that divides a matrix multiplication operation of a generated matrix acquired by using an arbitrary parity-check matrix of a quasi-cyclic (QC) LDPC code and information vectors into two sequential steps and implements each step as a cyclic shift-register. Unlike the prior art, the present invention provides an effective high-speed encoding method having low additional complexity by using a quasi-cyclic characteristic of a parity-check matrix as well as an encoding method through generation of a temporary parity bit, generation of a correction bit, and correction of a parity bit by using the parity-check matrix having a dual-diagonal parity structure proposed in the standard.
Abstract:
A touch panel device in which a support portion is provided to include an actuator for generating vibration giving an excellent sense of touch without the need for a separate mounting space. To this end, the touch panel device having a front cover portion, a touch sensor unit divided into an upper transparent electrode layer and a lower transparent electrode layer, and a substrate provided under the touch sensor portion includes an actuator for delivering vibration to the front cover portion, a reinforcing portion having the actuator attached thereto to attach the actuator to the touch sensor unit, and a support portion formed on the substrate to provide an opening in a first side thereof and a closed second side, such that the actuator is inserted into and coupled to the opening and the support portion supports the actuator to deliver the vibration of the actuator to the front cover portion.
Abstract:
An automatic white balance adjusting apparatus and method based on detection of an effective area. The automatic white balance adjusting apparatus may detect the effective area by using a color temperature, a luminance, and a correlation, and may adjust a white balance with respect to the detected effective area.
Abstract:
Provided are a wafer level chip scale package in which a redistribution process is applied at a wafer level, a manufacturing method thereof, and a semiconductor chip module including the wafer level chip scale package. The wafer level chip scale package includes a semiconductor chip having a bonding pad, a first insulating layer disposed on the semiconductor chip so as to expose the bonding pad, a redistribution line disposed on the exposed bonding pad and the first insulating layer, a sacrificial layer disposed below a redistribution pad of the redistribution line, a second insulating layer disposed on the redistribution line so as to expose the redistribution pad and including a crack inducement hole disposed beside the sacrificial layer, and an external connection terminal attached to the redistribution pad.
Abstract:
There is provided a frequency Selective Surface (FSS) structure for multi frequency bands configured with unit cells, each including a loop unit, arranged at regular intervals, wherein each unit cell includes: a dielectric layer; and the loop unit having a fixed width and formed on the dielectric layer, wherein the loop unit includes a first loop and a second loop formed inside the first loop with a predetermined space away from the first loop, each of the first loop and the second loop being formed sinuously in at least one portion.
Abstract:
Provided are a forward link rain attenuation compensating apparatus using an adaptive transmission scheme in an interactive satellite communication system and a method thereof. The apparatus separates the mobile stations into clear-sky mobile stations and mobile stations in the state of rain attenuation and makes the clear-sky mobile stations receive data having a high data transmission efficiency at a high-speed while making the rain attenuation mobile stations receive the data continuously although the data transmit rate is low by making each of the two kinds of mobile stations receive data frames of a different transmission method, and provides a method therefor. The apparatus includes: a resource manager, a transmitting data format converter, a forward modulator, a backward demodulator, a receiving data format converter.
Abstract:
A semiconductor device having a through electrode and a method of fabricating the same are disclosed. In one embodiment, a semiconductor device includes a first insulating layer formed on a semiconductor substrate. A wiring layer having a first aperture to expose a portion of the first insulating layer is formed on the first insulating layer. A second insulating layer is formed on an upper portion of the wiring layer and in the first aperture. A conductive pad having a second aperture to expose a portion of the second insulating layer is formed on the second insulating layer. A through hole with a width narrower than widths of the first and second apertures is formed through the first and second insulating layers and an upper portion of the semiconductor substrate. A through electrode is formed in the through hole.
Abstract:
A color reproduction apparatus may include a white balance performing unit to perform white balance with respect to an image obtained from a sensor using a white balance gain, an image restoring unit to restore an RGB image from the white-balanced image by interpolating a color filter array image, a first color corrector to correct a color distortion caused by a light source by applying first correction data, and a second color corrector to correct a color distortion caused by a characteristic of a sensor by applying second correction data.