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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08592988B2

    公开(公告)日：2013-11-26

    申请号：US13186049

    申请日：2011-07-19

    申请人： Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

    发明人： Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311

    摘要： A semiconductor device may include a substrate and a through electrode. The substrate may have a first surface and a second surface opposite to the first surface, the substrate including circuit patterns formed on the first surface. The through electrode penetrates the substrate and may be electrically connected to the circuit pattern, the through electrode including a first plug that extends from the first surface in a thickness direction of the substrate and a second plug that extends from the second surface in the thickness direction of the substrate so as to be connected to the first plug.

    摘要翻译： 半导体器件可以包括衬底和通孔。 衬底可以具有与第一表面相对的第一表面和第二表面，所述衬底包括形成在第一表面上的电路图案。 贯通电极穿透基板并且可以电连接到电路图案，所述通孔包括在基板的厚度方向上从第一表面延伸的第一插塞和在厚度方向上从第二表面延伸的第二插塞 以便连接到第一插头。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20120056330A1

    公开(公告)日：2012-03-08

    申请号：US13186049

    申请日：2011-07-19

    申请人： Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

    发明人： Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311

    摘要： A semiconductor device may include a substrate and a through electrode. The substrate may have a first surface and a second surface opposite to the first surface, the substrate including circuit patterns formed on the first surface. The through electrode penetrates the substrate and may be electrically connected to the circuit pattern, the through electrode including a first plug that extends from the first surface in a thickness direction of the substrate and a second plug that extends from the second surface in the thickness direction of the substrate so as to be connected to the first plug.

    摘要翻译： 半导体器件可以包括衬底和通孔。 衬底可以具有与第一表面相对的第一表面和第二表面，所述衬底包括形成在第一表面上的电路图案。 贯通电极穿透基板并且可以电连接到电路图案，所述通孔包括在基板的厚度方向上从第一表面延伸的第一插塞和在厚度方向上从第二表面延伸的第二插塞 以便连接到第一插头。

    Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
    9.
    发明申请
    Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package 审中-公开
    半导体芯片封装装置及半导体芯片封装的制造方法

    公开(公告)号：US20060202332A1

    公开(公告)日：2006-09-14

    申请号：US11418010

    申请日：2006-05-05

    申请人： Se-Young Jeong ,  Gi-Young Sohn ,  Ki-Kwon Jeong ,  Hyeon Hwang

    发明人： Se-Young Jeong ,  Gi-Young Sohn ,  Ki-Kwon Jeong ,  Hyeon Hwang

    IPC分类号： H01L23/48

    CPC分类号： H01L21/4835 ,  H01L23/49582 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2224/45099 ,  H01L2924/00

    摘要： Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus includes a plating unit that is disposed in a direction to form a conductive plating layer on external terminals of the semiconductor chip package; and a reflow unit that is disposed with the plating unit to melt the conductive plating layer. The packaging apparatus may further include a rinsing unit that is disposed with the plating unit to clean and cool the conductive plating layer. Thus, it is possible to effectively suppress the growth of whiskers on the plating layer of the external terminals, and to secure economical efficiency, reducing costs, and allowing mass production.

    摘要翻译： 公开了半导体芯片封装装置及其方法的示例性实施例。 包装装置包括镀敷单元，该镀覆单元沿着在半导体芯片封装的外部端子上形成导电镀层的方向设置; 以及与所述电镀单元配置以熔化所述导电性镀层的回流单元。 包装装置还可以包括与镀覆单元一起设置以清洁和冷却导电镀层的冲洗单元。 因此，可以有效地抑制外部端子的镀层上的晶须的生长，并且能够确保经济效益，降低成本，并且能够批量生产。