Abstract:
A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
Abstract:
This application pertains to antibodies which specifically bind to immunogenic memapsin 2β-secretase peptides for use in the treatment of Alzheimer's disease and memapsin 2β-secretase disorders. The application also pertains to immunogenic compositions comprising memapsin 2β-secretase peptides and uses thereof.
Abstract:
A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
Abstract:
A method for making chip resistor components includes: (a) forming a plurality of first and second notches in a substrate so as to form resistor-forming strips; (b) forming pairs of upper and lower electrodes on each of the resistor-forming strips; (c) forming a resistor film on each of the resistor-forming strips; (d) forming an insulator layer on the resistor film; (e) forming a hole pattern in the insulator layer and the resistor film; (f) forming an insulating shield layer on the insulator layer; (g) cleaving the substrate along the first notches so as to form a plurality of strip-like semi-finished products; (h) forming a pair of side electrodes on two opposite sides of each of the semi-finished products; and (i) cleaving each of the semi-finished products.
Abstract:
A measurement data recording system includes a microprocessor, a first switch and a second switch. The first switch sends a trigger signal to trigger a digital measurement instrument sends a measurement data. The microprocessor detects the trigger signal aroused by the first switch, receives the measurement data, and records it into the memory card. The microprocessor also detects a trigger signal aroused by the second switch and deletes the measurement data in the memory card. A method for recording the measurement data includes steps of detecting the trigger signal, detecting a status of the memory card, detecting a status of a data file in the memory card, receiving the measurement data and recording it into the data file while the trigger signal being aroused by the first switch, and deleting the measurement data recorded in the data file while the trigger signal being aroused by the second switch.
Abstract:
A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
Abstract:
An addressing device for transmitting satellite TV signal is electrically connected with a satellite down-converter and at least one STB installed at a subscriber end. When the subscriber activates the STB for playing satellite TV channel programs, the satellite down-converter receives satellite signals provide by a satellite system end and processes the satellite signals to generate baseband satellite TV signal for input into the addressing device. Next, the addressing device receives GPS signal indicating the position where it is installed and then addresses the GPS signal, further executing digital security processes to converting the area address into an address signal having the same transmission frequency as that of the baseband satellite TV signal. Finally, the address signal is mixed with the baseband satellite TV signal for output to the STB.
Abstract:
Memory devices are described along with methods for manufacturing. A memory device as described herein includes a first electrode and a second electrode. The memory device further includes a diode and an anti-fuse metal-oxide memory element comprising aluminum oxide and copper oxide. The diode and the metal-oxide memory element are arranged in electrical series between the first electrode and the second electrode.
Abstract:
A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1.
Abstract:
A swinging apparatus comprising an energy provider and a swinging mechanism disposed thereon. By means of adjusting the size and shape of the swinging mechanism and adjusting a distance between the swinging mechanism and the energy provider so as to control the ratio of the distance between the swinging mechanism and the energy provider to a characteristic value corresponding to the swing mechanism in a range between 4 and 0.25, the swinging frequency of the swinging mechanism may be adjusted automatically to comply with the variation of the motion frequency of the energy provider. The present invention further provides an energy harvester to work with the swinging apparatus and a coil to generate an induced current for power generation during the swing of the swing mechanism. In the present invention, the natural frequency of the swing mechanism may be adjusted according to the rotational velocity of the energy provider.