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    Low temperature chuck for plasma processing systems
    21.
    发明授权
    Low temperature chuck for plasma processing systems 有权

    公开(公告)号：US11594428B2

    公开(公告)日：2023-02-28

    申请号：US15581497

    申请日：2017-04-28

    Applicant: Applied Materials, Inc.

    Inventor： Toan Q. Tran ,  Zilu Weng ,  Dmitry Lubomirsky ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Son M. Phi ,  Shankar Venkataraman

    IPC: H01L21/67 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/687 ,  H01L21/311 ,  H01J37/32

    Abstract: A wafer chuck assembly includes a puck, a shaft and a base. The puck includes an electrically insulating material that defines a top surface of the puck; a plurality of electrodes are embedded within the electrically insulating material. The puck also includes an inner puck element that forms one or more channels for a heat exchange fluid, the inner puck element being in thermal communication with the electrically insulating material, and an electrically conductive plate disposed proximate to the inner puck element. The shaft includes an electrically conductive shaft housing that is electrically coupled with the plate, and a plurality of connectors, including electrical connectors for the electrodes. The base includes an electrically conductive base housing that is electrically coupled with the shaft housing, and an electrically insulating terminal block disposed within the base housing, the plurality of connectors passing through the terminal block.

    Semiconductor processing systems having multiple plasma configurations
    23.
    发明授权
    Semiconductor processing systems having multiple plasma configurations 有权

    公开(公告)号：US11024486B2

    公开(公告)日：2021-06-01

    申请号：US15581396

    申请日：2017-04-28

    Applicant: Applied Materials, Inc.

    Inventor： Dmitry Lubomirsky ,  Xinglong Chen ,  Shankar Venkataraman

    IPC: H01J37/32 ,  C23C16/455 ,  H01L21/67 ,  H01L21/3213 ,  C23C16/54 ,  C23C16/505

    Abstract: An exemplary system may include a chamber configured to contain a semiconductor substrate in a processing region of the chamber. The system may include a first remote plasma unit fluidly coupled with a first access of the chamber and configured to deliver a first precursor into the chamber through the first access. The system may still further include a second remote plasma unit fluidly coupled with a second access of the chamber and configured to deliver a second precursor into the chamber through the second access. The first and second access may be fluidly coupled with a mixing region of the chamber that is separate from and fluidly coupled with the processing region of the chamber. The mixing region may be configured to allow the first and second precursors to interact with each other externally from the processing region of the chamber.

    Enhanced etching processes using remote plasma sources
    24.
    发明授权
    Enhanced etching processes using remote plasma sources 有权

    公开(公告)号：US10424485B2

    公开(公告)日：2019-09-24

    申请号：US15173824

    申请日：2016-06-06

    Applicant: Applied Materials, Inc.

    Inventor： Nitin K. Ingle ,  Dmitry Lubomirsky ,  Xinglong Chen ,  Shankar Venkataraman

    IPC: H01L21/3065 ,  H01J37/32

    Abstract: Methods of etching a patterned substrate may include flowing an oxygen-containing precursor into a first remote plasma region fluidly coupled with a substrate processing region. The oxygen-containing precursor may be flowed into the region while forming a plasma in the first remote plasma region to produce oxygen-containing plasma effluents. The methods may also include flowing a fluorine-containing precursor into a second remote plasma region fluidly coupled with the substrate processing region while forming a plasma in the second remote plasma region to produce fluorine-containing plasma effluents. The methods may include flowing the oxygen-containing plasma effluents and fluorine-containing plasma effluents into the processing region, and using the effluents to etch a patterned substrate housed in the substrate processing region.

    INSULATED SEMICONDUCTOR FACEPLATE DESIGNS
    30.
    发明申请
    INSULATED SEMICONDUCTOR FACEPLATE DESIGNS 审中-公开
    绝缘半导体器件设计

    公开(公告)号：US20140252134A1

    公开(公告)日：2014-09-11

    申请号：US14162000

    申请日：2014-01-23

    Applicant: Applied Materials, Inc.

    Inventor： Xinglong Chen ,  Dmitry Lubomirsky ,  Shankar Venkataraman

    IPC: H01L21/3065

    CPC classification number: H01J37/3244 ,  C23C16/45565 ,  H01J37/32091 ,  H01J37/32357 ,  Y10T29/49826

    Abstract: An exemplary faceplate may include a conductive plate defining a plurality of apertures. The faceplate may additionally include a plurality of inserts, and each one of the plurality of inserts may be disposed within one of the plurality of apertures. Each insert may define at least one channel through the insert to provide a flow path through the faceplate.

    Abstract translation: 示例性面板可以包括限定多个孔的导电板。 面板可以另外包括多个插入件，并且多个插入件中的每一个可以设置在多个孔中的一个中。 每个插入件可以限定通过插入件的至少一个通道以提供通过面板的流动路径。

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