公开(公告)号：US20110210766A1

公开(公告)日：2011-09-01

申请号：US13105021

申请日：2011-05-11

申请人： Takaaki AOKI ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Takaaki AOKI ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H03B1/00

CPC分类号： H01L27/0629 ,  H01L27/0255 ,  H03K17/063 ,  H03K17/165 ,  H03K17/168 ,  H03K17/567 ,  H03K17/687 ,  H03K2217/0036

摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

摘要翻译： 开关电路包括：具有第一电极，第二电极和控制电极的晶体管; 齐纳二极管; 和电容器。 通过切换晶体管的控制电压，第一电极和第二电极之间的连接能够在导通状态和非导通状态之间暂时切换。 齐纳二极管和电容器串联耦合在晶体管的第一电极和控制电极之间。 第一电极是漏极或集电极。

公开(公告)号：US07800195B2

公开(公告)日：2010-09-21

申请号：US12071719

申请日：2008-02-26

申请人： Shoji Ozoe ,  Shoji Mizuno ,  Takaaki Aoki ,  Tomofusa Shiga

发明人： Shoji Ozoe ,  Shoji Mizuno ,  Takaaki Aoki ,  Tomofusa Shiga

IPC分类号： H01L31/058

CPC分类号： H01L29/945 ,  G01K7/015 ,  H01L28/40 ,  H01L29/92

摘要： A semiconductor apparatus is provided. The semiconductor apparatus includes a semiconductor substrate and a temperature sensing diode that is disposed on a surface part of the semiconductor substrate. A relation between a forward current flowing through the temperature sensing diode and a corresponding voltage drop across the temperature sensing diode varies with temperature. The semiconductor apparatus further includes a capacitor that is coupled with the temperature sensing diode, configured to reduce noise to act on the temperature sensing diode, and disposed such that the capacitor and the temperature sensing diode have a layered structure in a thickness direction of the semiconductor substrate.

摘要翻译： 提供一种半导体装置。 半导体装置包括设置在半导体衬底的表面部分上的半导体衬底和温度感测二极管。 流过温度感测二极管的正向电流和温度感测二极管两端的相应电压降之间的关系随着温度而变化。 半导体装置还包括与温度感测二极管耦合的电容器，其被配置为降低作用在温度感测二极管上的噪声，并且被布置为使得电容器和温度感测二极管在半导体的厚度方向上具有层状结构 基质。

公开(公告)号：US07799667B2

公开(公告)日：2010-09-21

申请号：US12219008

申请日：2008-07-15

申请人： Satoshi Shiraki ,  Yoshiaki Nakayama ,  Shoji Mizuno ,  Takashi Nakano ,  Akira Yamada

发明人： Satoshi Shiraki ,  Yoshiaki Nakayama ,  Shoji Mizuno ,  Takashi Nakano ,  Akira Yamada

IPC分类号： H01L21/336

CPC分类号： H01L29/7824 ,  H01L21/26586 ,  H01L21/76286 ,  H01L21/763 ,  H01L21/823418 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/0696 ,  H01L29/1041 ,  H01L29/105 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7825 ,  H01L29/7831 ,  H01L29/7835

摘要： A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.

摘要翻译： 半导体器件包括：具有主平面的半导体衬底; 设置在主平面上的基部区域; 源区域，其设置在所述基底区域中的所述主平面上，以比所述基底区域浅; 漏极区域，设置在所述主平面上，并且与所述基极区域间隔开; 设在主平面上的沟槽; 通过沟槽栅极绝缘膜设置在沟槽中的沟槽栅电极; 通过平面栅极绝缘膜设置在半导体衬底的主平面上的平面栅电极; 以及杂质扩散区域，其具有高浓度的杂质，并且设置在基极区域的一部分中，作为面向平面栅电极的沟道区域。

公开(公告)号：US07132347B2

公开(公告)日：2006-11-07

申请号：US10656326

申请日：2003-09-08

申请人： Hiroaki Himi ,  Takashi Nakano ,  Shoji Mizuno

发明人： Hiroaki Himi ,  Takashi Nakano ,  Shoji Mizuno

IPC分类号： H01L21/76

CPC分类号： H01L29/7816 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/7317 ,  H01L29/7824

摘要： A semiconductor device includes a common diffusion structure formed in each region of a substrate in which semiconductor components are formed. The diffusion structures are separated into sections by trenches to form semiconductor components. The trenches define sizes of the semiconductor components and isolate the semiconductor components from the surrounding area.

摘要翻译： 半导体器件包括形成在其中形成半导体部件的衬底的每个区域中的公共扩散结构。 扩散结构通过沟槽分成部分以形成半导体部件。 沟槽限定半导体部件的尺寸并将半导体部件与周围区域隔离。

公开(公告)号：US20050023644A1

公开(公告)日：2005-02-03

申请号：US10929621

申请日：2004-08-31

申请人： Takuya Okuno ,  Shoji Mizuno ,  Toshitaka Kanemaru

发明人： Takuya Okuno ,  Shoji Mizuno ,  Toshitaka Kanemaru

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/822 ,  H01L21/8222 ,  H01L21/8238 ,  H01L21/8247 ,  H01L21/8248 ,  H01L21/8249 ,  H01L21/84 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/102 ,  H01L27/115 ,  H01L27/12 ,  H01L29/417 ,  H01L29/732 ,  H01L29/76 ,  H01L29/786 ,  H01L31/0328

CPC分类号： H01L21/84 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/1203

摘要： In the manufacturing process of a Bi-CMOS semiconductor device, which includes a CMOSFET and a bipolar transistor, the steps for forming a well region, source regions, and drain regions of the CMOSFET are also used for forming the bipolar transistor. One of the steps is used for introducing impurities of the same conductivity type in a surface of a base region of the bipolar transistor in order to form a high impurity concentration region in the surface. The high impurity concentration region is formed such that the distance between an emitter region of the bipolar transistor and the high impurity concentration region becomes 1 to 2 μm. The shift in device characteristics of the bipolar transistor is improved by the high impurity concentration region even if the impurity concentration is relatively low at the surface of the base region of the bipolar transistor.

摘要翻译： 在包括CMOSFET和双极晶体管的Bi-CMOS半导体器件的制造工艺中，用于形成CMOSFET的阱区，源极区和漏极区的步骤也用于形成双极晶体管。 其中一个步骤用于在双极晶体管的基极区域的表面中引入相同导电类型的杂质，以便在表面上形成高的杂质浓度区域。 形成高杂质浓度区域，使得双极晶体管的发射极区域与高杂质浓度区域之间的距离变为1〜2μm。 即使在双极型晶体管的基极区域的表面上的杂质浓度相对较低，双极晶体管的器件特性的偏移也被高杂质浓度区域提高。

公开(公告)号：US4973104A

公开(公告)日：1990-11-27

申请号：US316963

申请日：1989-02-28

申请人： Keiji Nakayama ,  Shinobu Imai ,  Touru Kondo ,  Shoji Mizuno

发明人： Keiji Nakayama ,  Shinobu Imai ,  Touru Kondo ,  Shoji Mizuno

IPC分类号： B60N2/20

CPC分类号： B60N2/20

摘要： A car seat comprising a seat slide mechanism, a seat reclining mechanism and, walk-in system. The walk-in system is provided with a wire to unlock the seat slide means and the wire is arranged to loosen when the seat-back is swung backward by the reclining mechanism.

摘要翻译： 一种汽车座椅，包括座椅滑动机构，座椅倾斜机构和步入式系统。 该步进系统设置有用于解锁座椅滑动装置的电线，并且当座椅靠背由斜倚机构向后摆动时，电线被布置成松开。

公开(公告)号：US4079175A

公开(公告)日：1978-03-14

申请号：US718936

申请日：1976-08-30

申请人： Shoichi Tokunaga ,  Atsumi Kato ,  Teruhiro Setoguchi ,  Shoji Mizuno

发明人： Shoichi Tokunaga ,  Atsumi Kato ,  Teruhiro Setoguchi ,  Shoji Mizuno

IPC分类号： C08F4/642 ,  C08F10/00 ,  C08F4/66 ,  C08F10/06

CPC分类号： C08F10/00 ,  Y10S526/906

摘要： A method for the polymerization or copolymerization of .alpha.-olefin wherein .alpha.-olefin is polymerized or copolymerized in the presence of a catalyst essentially comprising a reformed titanium trichloride and an organoaluminum compound. The reformed titanium trichloride is prepared by simultaneously pulverizing an organoaluminum compound and a crystalline titanium trichloride compound, the latter comprising titanium trichloride and aluminum trichloride, treating the pulverized mixture with a solvent selected from aromatic hydrocarbons, aromatic hydrocarbon halides and organic ethers, separating the treated material from the solvent, and heating the separated material.

摘要翻译： 一种聚合或共聚α-烯烃的方法，其中α-烯烃在基本上包含重整的三氯化钛和有机铝化合物的催化剂存在下聚合或共聚。 重整的三氯化钛是通过同时粉碎有机铝化合物和结晶三氯化钛化合物制备的，后者包括三氯化钛和三氯化铝，用选自芳族烃，芳族烃卤化物和有机醚的溶剂处理粉碎的混合物，将处理过的 来自溶剂的材料，并加热分离的材料。

公开(公告)号：US08841719B2

公开(公告)日：2014-09-23

申请号：US13347004

申请日：2012-01-10

申请人： Seigo Oosawa ,  Shoji Mizuno ,  Yutaka Tomatsu

发明人： Seigo Oosawa ,  Shoji Mizuno ,  Yutaka Tomatsu

IPC分类号： H01L29/417 ,  H01L29/66 ,  H01L29/739 ,  H01L23/00 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/45 ,  H01L29/40

CPC分类号： H01L29/7397 ,  H01L24/49 ,  H01L29/0615 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7805 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2224/04042 ,  H01L2224/4911 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor device includes: a semiconductor substrate; an interlayer film on the substrate; a surface electrode on the interlayer film; a surface pad on the surface electrode; a backside electrode on the substrate; an element area including a cell portion having a vertical semiconductor element and a removal portion having multiple contact regions; and an outer periphery area. The surface electrode in the removal portion is electrically coupled with each contact region through a first contact hole in the interlayer film. The surface electrode in the cell portion is electrically coupled with the substrate through a second contact hole in the interlayer film. A part of the surface electrode in the removal portion facing each contact region is defined as a contact portion. The surface electrode includes multiple notches on a shortest distance line segment between each contact portion and the surface pad.

摘要翻译： 半导体器件包括：半导体衬底; 衬底上的中间膜; 中间膜上的表面电极; 表面电极上的表面焊盘; 衬底上的背面电极; 元件区域，包括具有垂直半导体元件的单元部分和具有多个接触区域的去除部分; 和外围区域。 去除部分中的表面电极通过中间膜中的第一接触孔与每个接触区域电耦合。 电池部分中的表面电极通过中间膜中的第二接触孔与衬底电耦合。 面向每个接触区域的去除部分中的表面电极的一部分被定义为接触部分。 表面电极在每个接触部分和表面焊盘之间的最短距离线段上包括多个凹口。

公开(公告)号：US06879029B2

公开(公告)日：2005-04-12

申请号：US10340747

申请日：2003-01-13

申请人： Nobumasa Ueda ,  Shoji Mizuno

发明人： Nobumasa Ueda ,  Shoji Mizuno

IPC分类号： H01L21/306 ,  H01L21/762 ,  H01L23/02 ,  H01L23/06

CPC分类号： H01L21/76264 ,  H01L21/30625 ,  H01L21/76283

摘要： When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.

摘要翻译： 当形成具有元件隔离结构的半导体器件时，首先，从晶片的主表面在晶片中形成沟槽，并且填充有绝缘膜。 然后，抛光晶片的背面，使得绝缘膜在背面露出。 因此，绝缘膜从主面到背面贯穿晶片，从而进行晶片的元件隔离。 不需要使用接合晶片。 因此，简化了半导体器件的制造方法。

公开(公告)号：US20050001265A1

公开(公告)日：2005-01-06

申请号：US10864518

申请日：2004-06-10

申请人： Satoshi Shiraki ,  Yoshiaki Nakayama ,  Shoji Mizuno ,  Takashi Nakano ,  Akira Yamada

发明人： Satoshi Shiraki ,  Yoshiaki Nakayama ,  Shoji Mizuno ,  Takashi Nakano ,  Akira Yamada

IPC分类号： H01L21/76 ,  H01L21/336 ,  H01L21/763 ,  H01L21/8234 ,  H01L27/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L29/7824 ,  H01L21/26586 ,  H01L21/76286 ,  H01L21/763 ,  H01L21/823418 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/0696 ,  H01L29/1041 ,  H01L29/105 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7825 ,  H01L29/7831 ,  H01L29/7835

摘要： A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.

摘要翻译： 半导体器件包括：具有主平面的半导体衬底; 设置在主平面上的基部区域; 源区域，其设置在所述基底区域中的所述主平面上，以比所述基底区域浅; 漏极区域，设置在所述主平面上，并且与所述基极区域间隔开; 设在主平面上的沟槽; 通过沟槽栅极绝缘膜设置在沟槽中的沟槽栅电极; 通过平面栅极绝缘膜设置在半导体衬底的主平面上的平面栅电极; 以及杂质扩散区域，其具有高浓度的杂质，并且设置在基极区域的一部分中，作为面向平面栅电极的沟道区域。