公开(公告)号：US20180204769A1

公开(公告)日：2018-07-19

申请号：US15104551

申请日：2015-10-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaowei XU ,  Libin LIU ,  Liangjian LI ,  Chunping LONG

IPC: H01L21/77 ,  H01L23/552 ,  H01L27/12 ,  H01L27/32

CPC classification number: H01L21/77 ,  H01L23/552 ,  H01L27/12 ,  H01L27/32 ,  H01L27/3258 ,  H01L27/3272

Abstract: The present disclosure provides a Low Temperature Poly Silicon (LTPS) backboard, a method for manufacturing the LTPS, and a light-emitting device. The LTPS backboard includes: a base substrate, and a thin film transistor (TFT) and a light blocking layer that are arranged above the base substrate, wherein the light blocking layer is arranged above the TFT, and the light blocking layer is configured for preventing an irradiation light from irradiating onto the TFT.

公开(公告)号：US20180033642A1

公开(公告)日：2018-02-01

申请号：US15325117

申请日：2015-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Xiaoyong LU ,  Dong LI ,  Xiaolong LI ,  Chunping LONG

IPC: H01L21/3205 ,  H01L29/45 ,  C23C14/00 ,  C23C14/14 ,  C23C14/34 ,  C23C14/06 ,  H01L21/768 ,  H01L27/12

CPC classification number: H01L21/32051 ,  C23C14/0073 ,  C23C14/0641 ,  C23C14/14 ,  C23C14/34 ,  H01L21/2855 ,  H01L21/7685 ,  H01L21/76895 ,  H01L23/53223 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/458

Abstract: The present disclosure provides a thin film transistor, a thin film transistor array substrate, and a display apparatus, and their fabrication methods. The thin film transistor is formed by forming a source and drain electrode structure. To form the source and drain electrode structure, at least one metal film is formed using a target of a metal element in a sputtering chamber. A gas is introduced in the sputtering chamber to in-situ react with the metal element to form an anti-reflection layer over the at least one metal film.

公开(公告)号：US20170117148A1

公开(公告)日：2017-04-27

申请号：US14894908

申请日：2015-07-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wenqing XU ,  Chunping LONG

IPC: H01L21/02 ,  H01L27/12 ,  H01L29/786 ,  H01L29/04 ,  H01L29/16

CPC classification number: H01L21/02513 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02675 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1274 ,  H01L27/1277 ,  H01L29/04 ,  H01L29/16 ,  H01L29/78672

Abstract: A semiconductor device, comprising a base substrate, a buffer layer and a polysilicon layer film, wherein the base substrate, the buffer layer and the polysilicon layer film being laminated sequentially, and wherein regularly arranged first grooves being provided on a surface of the buffer layer contacting the polysilicon film; the polysilicon film being formed, by applying crystallization treatment, through an optical annealing process, to an amorphous silicon film on the buffer layer having regularly arranged first grooves.

公开(公告)号：US20160300866A1

公开(公告)日：2016-10-13

申请号：US14436563

申请日：2014-09-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Jang Soon IM ,  Chien Hung LIU

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1343 ,  H01L27/32 ,  G02F1/1368

CPC classification number: H01L27/1288 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/13625 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/77 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/3248 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78675

Abstract: An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method for manufacturing the TFT comprises: forming a pattern of an active layer and a gate insulating layer provided with a metal film on a base substrate patterning the metal film by one patterning process, and forming patterns of a gate electrode, a source electrode, a drain electrode, a gate line and a data line; forming a passivation layer on the base substrate; patterning the passivation layer by one patterning process, and forming a source contact hole, a drain contact hole and a bridge structure contact hole; and forming a transparent conductive film on the base substrate, and removing partial transparent conductive film to form a source contact portion, a drain contact portion, a pixel electrode and a bridge structure.

Abstract translation: 公开了阵列基板及其制造方法，显示装置，薄膜​​晶体管（TFT）及其制造方法。 TFT的制造方法包括：在基板上形成有源层的图形和设置有金属膜的栅极绝缘层，通过一个图案化工艺图案化金属膜，形成栅电极，源电极， 漏电极，栅极线和数据线; 在基底基板上形成钝化层; 通过一个图案化工艺图案化钝化层，并形成源极接触孔，漏极接触孔和桥接结构接触孔; 在基底基板上形成透明导电膜，除去部分透明导电膜，形成源极接触部，漏极接触部，像素电极和桥接结构。

公开(公告)号：US20160293771A1

公开(公告)日：2016-10-06

申请号：US14764307

申请日：2014-12-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Yinan LIANG

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/45 ,  H01L23/31 ,  H01L21/02 ,  H01L29/66 ,  H01L21/265 ,  H01L21/283 ,  H01L21/3065 ,  H01L29/49 ,  H01L27/12 ,  H01L21/027

CPC classification number: H01L29/78675 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0273 ,  H01L21/26513 ,  H01L21/283 ,  H01L21/3065 ,  H01L21/32139 ,  H01L23/3171 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/4958 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/78633 ,  H01L2227/323

Abstract: A thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The thin film transistor includes a gate electrode, a source electrode, a drain electrode, an active layer and a gate insulation layer. The gate insulation layer is provided above the active layer, the gate, the source electrode and the drain electrode are provided on a same layer above the gate insulation layer, the active layer and the source electrode are connected through a first connection electrode, and the active layer and the drain electrode are connected through a second connection electrode. The thin film transistor can be formed by three times of patterning processes, by which the process time period is shortened, the process yield is improved, and the process cost is reduced, and so on.

Abstract translation: 提供薄膜晶体管及其制造方法，阵列基板及其制造方法以及显示装置。 薄膜晶体管包括栅电极，源电极，漏电极，有源层和栅极绝缘层。 栅极绝缘层设置在有源层上方，栅极，源电极和漏电极设置在栅极绝缘层上方的同一层上，有源层和源极通过第一连接电极连接， 有源层和漏电极通过第二连接电极连接。 可以通过三次图案化工艺形成薄膜晶体管，缩短处理时间，提高工艺成品率，降低工艺成本等。

公开(公告)号：US20250124868A1

公开(公告)日：2025-04-17

申请号：US18833005

申请日：2023-06-30

Applicant: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Jingbo XU

IPC: G09G3/3233

Abstract: A semiconductor substrate, a driving method therefor, and a semiconductor display apparatus are provided. Each pixel unit includes a pixel circuit and a light emitting element. The pixel circuit includes a driving circuit, a data writing circuit, a storage circuit, a sensing circuit, and a protecting circuit. The driving circuit controls a drive current that drives the light emitting element. The data writing circuit writes a data signal into the driving circuit. The storage circuit stores the data signal. The sensing circuit is configured to connect the driving circuit with a sensing signal line. The protecting circuit is configured to prevent static electricity generated by the sensing circuit from flowing to the light emitting element and supply the drive current jointly with the driving circuit. The light emitting element is configured to emit light according to the drive current.

公开(公告)号：US20230352624A1

公开(公告)日：2023-11-02

申请号：US17761253

申请日：2021-03-19

Applicant: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Qi QI ,  Xinxin ZHAO ,  Wanzhi CHEN

IPC: H01L33/62 ,  H01L33/38 ,  H01L25/16 ,  H01L25/075

CPC classification number: H01L33/38 ,  H01L25/0753 ,  H01L25/167 ,  H01L33/62

Abstract: A light emitting substrate and a display device are provided, the light emitting substrate includes: a base substrate; an electrode planarization layer, on the base substrate; an electrode layer, at a side of the electrode planarization layer away from the base substrate, the electrode layer includes a first electrode and a second electrode, the first electrode includes at least one first electrode strip, the second electrode includes at least one second electrode strip, the first electrode strip and the second electrode strip are spaced and alternately arranged in a first direction, each of the at least one first electrode strip and each of the at least one second electrode strip extend along a second direction, the electrode planarization layer includes a first groove between a first electrode strip and a second electrode strip which are adjacent to each other, the first groove is configured to accommodate a light emitting diode.

公开(公告)号：US20220326558A1

公开(公告)日：2022-10-13

申请号：US16982347

申请日：2020-04-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Hui LI

IPC: G02F1/1368 ,  H01L27/12 ,  G02F1/1362

Abstract: The present disclosure relates to an array substrate, a display panel, and a display device. The array substrate comprises a display area and a non-display area surrounding the display area; wherein: the display area includes gate lines and data lines, and a plurality of pixel units defined by the intersections of gate lines and data lines, each of the pixel units including a thin film transistor and a pixel electrode electrically connected to a drain electrode of the thin film transistor; the non-display area includes a plurality of dummy pixel units arranged around the display area, each of the dummy pixel units including a dummy thin film transistor and a dummy pixel electrode floating relative to a drain electrode of the dummy thin film transistor; the non-display area further includes a dummy common electrode structure electrically connected to at least some of the dummy pixel units.

公开(公告)号：US20210336212A1

公开(公告)日：2021-10-28

申请号：US16614140

申请日：2019-06-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: H01L51/52 ,  H01L27/32 ,  H01L51/56

Abstract: The present disclosure provides a display substrate, a fabrication method thereof and a display panel. The display substrate includes a display area (101) and a non-display area (102) around the display area (101), the display substrate further includes: a base substrate (100); at least one barrier dam (200) and a first encapsulating layer (310) on the base substrate (100), the barrier dam (200) is in the non-display area (102) on the base substrate (100), the first encapsulating layer (310) is on the base substrate (100) and on a side of the at least one barrier dam (200) facing the display area (101), the first encapsulating layer (310) is formed by a first encapsulating material (301) in a cured state, and at least a side of the barrier dam (200) facing the first encapsulating layer (310) is lyophobic with respect to the first encapsulating material (301) in a non-cured state.

公开(公告)号：US20210333658A1

公开(公告)日：2021-10-28

申请号：US16343037

申请日：2018-09-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Hui LI

IPC: G02F1/1343

Abstract: A pixel structure and a manufacturing method thereof, an array substrate and a display device are provided. The pixel structure includes a first electrode having a first groove group, a second groove group and a non-hollow portion; the first groove group includes a plurality of hollow first grooves arranged successively, each first groove includes a first end and a second end arranged along an extending direction thereof; the second groove group includes a plurality of hollow second grooves arranged successively, each second groove includes a third end and a fourth end arranged along an extending direction thereof, and a third end is on a side of the fourth end adjacent to the first groove group; and the third end of at least one second groove is staggered with respect to the second endo of the first groove adjacent to the third end.