公开(公告)号：US20060017145A1

公开(公告)日：2006-01-26

申请号：US11212182

申请日：2005-08-26

申请人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

发明人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

IPC分类号： H01L23/06

CPC分类号： H01L23/36 ,  H01L23/3675 ,  H01L23/49816 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/00014

摘要： A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive material to be applied between the heat sink and the substrate and filled into the grooves or holes for attaching the heat sink onto the substrate. The adhesive material filled into the grooves or holes provides an anchoring effect for firmly positioning the heat sink on the substrate. Therefore, it is not necessary to form predetermined holes on the substrate for being coupled to fixing members such as bolts, and incorporation of the heat sink would not affect trace routability and arrangement of input/output connections such as solder balls on the substrate and would not lead to cracks of the chip.

摘要翻译： 提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。 散热器在与基板接触的位置处形成有多个凹槽或孔，允许将粘合材料施加在散热器和基板之间并填充到用于将散热器附接到基板上的凹槽或孔中。 填充到槽或孔中的粘合剂材料提供了将散热器牢固地定位在基板上的锚固效果。 因此，不需要在基板上形成预定的孔，用于连接诸如螺栓的固定构件，并且散热器的结合不会影响迹线布线性以及诸如衬底上的焊球等输入/输出连接的布置 不会导致芯片的裂纹。

公开(公告)号：US20050280132A1

公开(公告)日：2005-12-22

申请号：US11212290

申请日：2005-08-26

申请人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

发明人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

IPC分类号： H01L23/367 ,  H01L23/06

CPC分类号： H01L23/36 ,  H01L23/3675 ,  H01L23/49816 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/00014

摘要： A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive material to be applied between the heat sink and the substrate and filled into the grooves or holes for attaching the heat sink onto the substrate. The adhesive material filled into the grooves or holes provides an anchoring effect for firmly positioning the heat sink on the substrate. Therefore, it is not necessary to form predetermined holes on the substrate for being coupled to fixing members such as bolts, and incorporation of the heat sink would not affect trace routability and arrangement of input/output connections such as solder balls on the substrate and would not lead to cracks of the chip.

摘要翻译： 提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。 散热器在与基板接触的位置处形成有多个凹槽或孔，允许将粘合材料施加在散热器和基板之间并填充到用于将散热器附接到基板上的凹槽或孔中。 填充到槽或孔中的粘合剂材料提供了将散热器牢固地定位在基板上的锚固效果。 因此，不需要在基板上形成预定的孔，用于连接诸如螺栓的固定构件，并且散热器的结合不会影响迹线布线性以及诸如衬底上的焊球等输入/输出连接的布置 不会导致芯片的裂纹。

公开(公告)号：US20110070697A1

公开(公告)日：2011-03-24

申请号：US12955256

申请日：2010-11-29

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/48

CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置相对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

公开(公告)号：US07489044B2

公开(公告)日：2009-02-10

申请号：US11592046

申请日：2006-11-01

申请人： Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module to form an encapsulant encapsulating the semiconductor chip, exposing the electrical connecting points from the encapsulant; forming a patterned circuit layer on the encapsulant, electrically connecting the patterned circuit layer to the electrical connecting points, cutting and separating the chip carriers to form a plurality of semiconductor packages each having a circuit layer formed on the encapsulant such that the circuit layer provides extra electrical connecting points and thereby enhances electrical performance of electrical products. During a package stacking process, no package is limited by the design of another package below.

摘要翻译： 本发明提供半导体封装及其制造方法。 该方法包括以下步骤：提供具有多个芯片载体的芯片载体模块，在芯片载体上布置多个电连接点，在芯片载体模块上执行芯片安装和模制以形成封装半导体芯片的密封剂， 将电连接点暴露于密封剂; 在所述密封剂上形成图案化电路层，将所述图案化电路层电连接到所述电连接点，切割和分离所述芯片载体以形成多个半导体封装，每个半导体封装具有形成在所述密封剂上的电路层，使得所述电路层提供额外的 电连接点，从而提高电气产品的电气性能。 在包装堆垛过程中，没有包装受下面另一包装的设计限制。

公开(公告)号：US20060160348A1

公开(公告)日：2006-07-20

申请号：US11100140

申请日：2005-04-05

申请人： Han-Ping Pu ,  Chun-Chi Ke ,  Kuo-Jui Tai ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Chun-Chi Ke ,  Kuo-Jui Tai ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor element with under bump metallurgy (UBM) structures and a fabrication method thereof are proposed. When UBM structures are formed on signal pads and ground pads on a surface of the semiconductor element that is completely fabricated with a circuit layout, a metallic layer for defining the UBM structures is retained, wherein the UBM structures on the ground pads are electrically connected to the metallic layer, and the UBM structures on the signal pads are electrically insulated from the metallic layer. This allows the metallic layer for defining the UBM structures to directly serve as a grounding layer for the semiconductor element.

摘要翻译： 提出了具有凸块下冶金（UBM）结构的半导体元件及其制造方法。 当在完全由电路布局制造的半导体元件的表面上的信号焊盘和接地焊盘上形成UBM结构时，保留用于限定UBM结构的金属层，其中接地焊盘上的UBM结构电连接到 金属层和信号焊盘上的UBM结构与金属层电绝缘。 这允许用于限定UBM结构的金属层直接用作半导体元件的接地层。

公开(公告)号：US07855443B2

公开(公告)日：2010-12-21

申请号：US11732853

申请日：2007-04-04

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/02

CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

公开(公告)号：US07666716B2

公开(公告)日：2010-02-23

申请号：US12367723

申请日：2009-02-09

申请人： Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module to form an encapsulant encapsulating the semiconductor chip, exposing the electrical connecting points from the encapsulant; forming a patterned circuit layer on the encapsulant, electrically connecting the patterned circuit layer to the electrical connecting points, cutting and separating the chip carriers to form a plurality of semiconductor packages each having a circuit layer formed on the encapsulant such that the circuit layer provides extra electrical connecting points and thereby enhances electrical performance of electrical products. During a package stacking process, no package is limited by the design of another package below.

摘要翻译： 本发明提供半导体封装及其制造方法。 该方法包括以下步骤：提供具有多个芯片载体的芯片载体模块，在芯片载体上布置多个电连接点，在芯片载体模块上执行芯片安装和模制以形成封装半导体芯片的密封剂， 将电连接点暴露于密封剂; 在所述密封剂上形成图案化电路层，将所述图案化电路层电连接到所述电连接点，切割和分离所述芯片载体以形成多个半导体封装，每个半导体封装具有形成在所述密封剂上的电路层，使得所述电路层提供额外的 电连接点，从而提高电气产品的电气性能。 在包装堆垛过程中，没有包装受下面另一包装的设计限制。

公开(公告)号：US20090146285A1

公开(公告)日：2009-06-11

申请号：US12367723

申请日：2009-02-09

申请人： Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module to form an encapsulant encapsulating the semiconductor chip, exposing the electrical connecting points from the encapsulant; forming a patterned circuit layer on the encapsulant, electrically connecting the patterned circuit layer to the electrical connecting points, cutting and separating the chip carriers to form a plurality of semiconductor packages each having a circuit layer formed on the encapsulant such that the circuit layer provides extra electrical connecting points and thereby enhances electrical performance of electrical products. During a package stacking process, no package is limited by the design of another package below.

摘要翻译： 本发明提供半导体封装及其制造方法。 该方法包括以下步骤：提供具有多个芯片载体的芯片载体模块，在芯片载体上布置多个电连接点，在芯片载体模块上执行芯片安装和模制以形成封装半导体芯片的密封剂， 将电连接点暴露于密封剂; 在所述密封剂上形成图案化电路层，将所述图案化电路层电连接到所述电连接点，切割和分离所述芯片载体以形成多个半导体封装，每个半导体封装具有形成在所述密封剂上的电路层，使得所述电路层提供额外的 电连接点，从而提高电气产品的电气性能。 在包装堆垛过程中，没有包装受下面另一包装的设计限制。

公开(公告)号：US07485496B2

公开(公告)日：2009-02-03

申请号：US11648443

申请日：2006-12-29

申请人： Kun-Sheng Chien ,  Shih-Kuang Chiu ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Kun-Sheng Chien ,  Shih-Kuang Chiu ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/00

CPC分类号： H01L23/3675 ,  H01L21/4871 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/16251

摘要： A semiconductor package with a heat sink and a method for fabricating the same are proposed. A first adhesive of a low Young's modulus is disposed on a corner region of a heat sink mounting area of a substrate. A second adhesive of a high Young's modulus is disposed on the heat sink mounting area except the corner region. The heat sink is mounted on the heat sink mounting area and thereby secured in position to the substrate, by the first and second adhesives. The disposition of the first and second adhesives of different Young's moduli not only prevents detachment of the heat sink from the substrate, but also controls the flatness of the heat sink. The prevent invention does not affect the appearance of the semiconductor package and its ensuing assembly process.

摘要翻译： 提出了具有散热器的半导体封装及其制造方法。 低杨氏模量的第一粘合剂设置在基板的散热器安装区域的拐角区域。 高杨氏模量的第二粘合剂设置在除了拐角区域之外的散热器安装区域上。 散热器安装在散热器安装区域上，从而通过第一和第二粘合剂固定到基板上。 不同杨氏模量的第一和第二粘合剂的配置不仅防止散热器从基板脱离，而且还控制散热器的平坦度。 防止发明不影响半导体封装的外观及其随后的组装过程。

公开(公告)号：US20070235861A1

公开(公告)日：2007-10-11

申请号：US11648443

申请日：2006-12-29

申请人： Kun-Sheng Chien ,  Shih-Kuang Chiu ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Kun-Sheng Chien ,  Shih-Kuang Chiu ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H01L23/3675 ,  H01L21/4871 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/16251

摘要： A semiconductor package with a heat sink and a method for fabricating the same are proposed. A first adhesive of a low Young's modulus is disposed on a corner region of a heat sink mounting area of a substrate. A second adhesive of a high Young's modulus is disposed on the heat sink mounting area except the corner region. The heat sink is mounted on the heat sink mounting area and thereby secured in position to the substrate, by the first and second adhesives. The disposition of the first and second adhesives of different Young's moduli not only prevents detachment of the heat sink from the substrate, but also controls the flatness of the heat sink. The prevent invention does not affect the appearance of the semiconductor package and its ensuing assembly process.

摘要翻译： 提出了具有散热器的半导体封装及其制造方法。 低杨氏模量的第一粘合剂设置在基板的散热器安装区域的拐角区域。 高杨氏模量的第二粘合剂设置在除了拐角区域之外的散热器安装区域上。 散热器安装在散热器安装区域上，从而通过第一和第二粘合剂固定到基板上。 不同杨氏模量的第一和第二粘合剂的配置不仅防止散热器从基板脱离，而且还控制散热器的平坦度。 防止发明不影响半导体封装的外观及其随后的组装过程。