公开(公告)号：US20140248723A1

公开(公告)日：2014-09-04

申请号：US14276566

申请日：2014-05-13

Applicant: Cisco Technology, Inc.

Inventor： Kalpendu SHASTRI ,  Vipulkumar PATEL ,  Mark WEBSTER ,  Prakash GOTHOSKAR ,  Ravinder KACHRU ,  Soham PATHAK ,  Rao V. YELAMARTY ,  Thomas DAUGHERTY ,  Bipin DAMA ,  Kaushik PATEL ,  Kishor DESAI

IPC: H01L25/00 ,  H01L25/16

CPC classification number: H01L25/50 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4245 ,  G02B6/4249 ,  G02B6/4257 ,  G02B6/426 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

Abstract translation: 光电子收发器组件过程的晶片级实现利用硅晶片作为光学参考平面和平台，同时为多个单独的收发器模块组装所有必需的光学和电子部件。 特别地，硅晶片被用作“平台”（插入器），在其上安装或集成多个收发器模块的所有组件，硅插入器的顶表面用作参考平面，用于定义 分离光学元件之间的光信号路径。 实际上，通过使用单个硅晶片作为大量单独的收发器模块的平台，可以使用晶片尺度组装过程以及这些模块的光学对准和测试。

公开(公告)号：US20210223487A1

公开(公告)日：2021-07-22

申请号：US17301407

申请日：2021-04-01

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Kumar Satya Harinadh POTLURI ,  Jock T. BOVINGTON ,  Ashley J. MAKER

IPC: G02B6/38 ,  G02B6/28 ,  G02B6/26 ,  H04B10/25

Abstract: A fiber array unit (FAU) includes a substrate, a plurality of optical fibers, and a lid. The substrate includes: an optical window extending through a layer of non-transparent material, a plurality of grooves, and an alignment protrusion configured to mate with an alignment receiver. The plurality of optical fibers are disposed in the plurality of grooves. The alignment protrusion is configured to align the plurality of optical fibers with an external device when mated with the alignment receiver. The plurality of optical fibers is disposed between the lid and the substrate.

公开(公告)号：US20200049890A1

公开(公告)日：2020-02-13

申请号：US16058608

申请日：2018-08-08

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Matthew J. TRAVERSO ,  Ashley J. MAKER ,  Jock T. BOVINGTON

IPC: G02B6/30

Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.

公开(公告)号：US20190285813A1

公开(公告)日：2019-09-19

申请号：US16146311

申请日：2018-09-28

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Ashley J. MAKER ,  Anthony D. KOPINETZ

IPC: G02B6/42

Abstract: An apparatus comprises a plurality of optical fibers and a lid member having one or more surfaces with grooves formed therein. The lid member defines a first plurality of grooves that are each dimensioned to partly receive an optical fiber of the plurality of optical fibers. The apparatus further comprises a substrate comprising a plurality of waveguides arranged at a predefined depth relative to a reference surface of the substrate, and a plurality of ribs extending from the reference surface. Each rib of the plurality of ribs is dimensioned to engage with a respective groove of a second plurality of grooves of the lid member. Engaging the plurality of ribs of the substrate with the second plurality of grooves of the lid member provides an optical alignment of the plurality of optical fibers with the plurality of waveguides.

公开(公告)号：US20180011247A1

公开(公告)日：2018-01-11

申请号：US15203571

申请日：2016-07-06

Applicant: Cisco Technology, Inc.

Inventor： Stefan Martin PFNUER ,  Matthew Joseph TRAVERSO ,  Vipulkumar PATEL

IPC: G02B6/12 ,  G02B6/42

CPC classification number: G02B6/12002 ,  G02B6/423 ,  G02B6/4238 ,  G02B6/4245 ,  G02B6/4274 ,  G02B6/428 ,  G02B6/43 ,  G02B2006/121 ,  G02B2006/12102 ,  G02B2006/12121

Abstract: Embodiments include an optical apparatus and associated method of assembling. The optical apparatus comprises a substrate defining a first surface and a channel formed relative thereto, the substrate including one or more waveguides extending to a sidewall partly defining the channel, a plurality of first electrical contacts formed on the first surface. The optical apparatus further comprises a carrier member defining a second surface and at least a third surface, the second surface coupled with the first surface of the substrate. The optical apparatus further at least one optical component coupled with the second surface and at least partly disposed within the channel, wherein the at least one optical component is optically coupled with the one or more waveguides and electrically connected with the first electrical contacts via a plurality of second electrical contacts at the third surface of the carrier member.

公开(公告)号：US20170139142A1

公开(公告)日：2017-05-18

申请号：US15143944

申请日：2016-05-02

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Mark WEBSTER ,  Ravi TUMMIDI ,  Mary NADEAU

IPC: G02B6/293 ,  G02B6/42 ,  G02B6/30

CPC classification number: G02B6/12004 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/124 ,  G02B6/125 ,  G02B6/305 ,  G02B6/34 ,  G02B6/4206 ,  G02B6/4274 ,  G02B6/4291

Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.

公开(公告)号：US20170139132A1

公开(公告)日：2017-05-18

申请号：US15208658

申请日：2016-07-13

Applicant: Cisco Technology ,Inc.

Inventor： Vipulkumar PATEL ,  Mark WEBSTER ,  Ravi TUMMIDI ,  Mary NADEAU

IPC: G02B6/12 ,  G02B6/34 ,  G02B6/122 ,  G02B6/124 ,  G02B6/42 ,  G02B6/125

CPC classification number: G02B6/12004 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/124 ,  G02B6/125 ,  G02B6/305 ,  G02B6/34 ,  G02B6/4206 ,  G02B6/4274 ,  G02B6/4291

Abstract: The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.

公开(公告)号：US20160266321A1

公开(公告)日：2016-09-15

申请号：US14658220

申请日：2015-03-15

Applicant: Cisco Technology, Inc.

Inventor： Ravi Sekhar TUMMIDI ,  Mark WEBSTER ,  Vipulkumar PATEL

IPC: G02B6/30 ,  G02B6/10 ,  G02B6/122 ,  G02B6/12

CPC classification number: G02B6/30 ,  G02B6/107 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/1228 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/121 ,  G02B2006/12142

Abstract: Embodiments herein describe disposing a waveguide adapter onto an SOI device after the components on a silicon surface layer have been formed. That is, the waveguide adapter is disposed above optical components (e.g., optical modulators, detectors, waveguides, etc) formed in a surface layer. In one embodiment, a waveguide in a bottom layer of the waveguide adapter overlaps a silicon waveguide in the surface layer such that the silicon waveguide and the waveguide in the bottom layer are optically coupled. The waveguide adapter also includes other layers above the bottom layer (e.g., middle and top layers) that also contain waveguides which form an adiabatic optical system for transmitting an optical signal. At least one of the waveguides in the multi-layer adapter is exposed at an optical interface of the SOI device, thereby permitting the SOI device to transmit optical signals to, or receive optical signals from, an external optical component.

Abstract translation: 本文的实施例描述了在形成硅表面层上的组分之后将波导适配器设置在SOI器件上。 也就是说，波导适配器设置在形成在表面层中的光学部件（例如，光学调制器，检测器，波导等）之上。 在一个实施例中，波导适配器的底层中的波导与表面层中的硅波导重叠，使得硅波导和底层中的波导光学耦合。 波导适配器还包括底层（例如，中层和顶层）之上的其它层，其也包含形成用于传输光信号的绝热光学系统的波导。 多层适配器中的至少一个波导在SOI器件的光学接口处露出，从而允许SOI器件将光信号传输到外部光学部件或从外部光学部件接收光信号。

公开(公告)号：US20150023377A1

公开(公告)日：2015-01-22

申请号：US14510654

申请日：2014-10-09

Applicant: Cisco Technology, Inc.

Inventor： Kalpendu SHASTRI ,  Soham PATHAK ,  Vipulkumar PATEL ,  Bipin DAMA ,  Kishor DESAI

IPC: H01S5/024 ,  H01S5/022 ,  H01S5/40 ,  H01S5/00

CPC classification number: H01S5/02415 ,  G02B6/42 ,  G02B6/4273 ,  H01S5/005 ,  H01S5/0064 ,  H01S5/02248 ,  H01S5/024 ,  H01S5/02469 ,  H01S5/4025

Abstract: An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.

Abstract translation: 形成用于光电组件的插入器（支撑衬底），以包括热隔离区域，其中可以将温度敏感器件（例如激光二极管）定位并独立于其中的温度波动 部件。 通过形成介电材料的边界通过插入件的厚度来实现热隔离，绝缘体的外围限定了热隔离区域和组件的其余部分之间的边界。 热电冷却器可与温度敏感设备结合使用，以稳定这些设备的运行。