公开(公告)号：US20150179917A1

公开(公告)日：2015-06-25

申请号：US14138656

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Frank Greer ,  Andy Steinbach

IPC: H01L39/24

CPC classification number: H01L39/2493

Abstract: Metal oxide tunnel barrier layers for superconducting tunnel junctions are formed by atomic layer deposition. Both precursors include a metal (which may be the same metal or may be different). The first precursor is a metal alkoxide with oxygen bonded to the metal, and the second precursor is an oxygen-free metal precursor with an alkyl-reactive ligand such as a halogen or methyl group. The alkyl-reactive ligand reacts with the alkyl group of the alkoxide, forming a detached by-product and leaving a metal oxide monolayer. The temperature is selected to promote the reaction without causing the metal alkoxide to self-decompose. The oxygen in the alkoxide precursor is bonded to a metal before entering the chamber and remains bonded throughout the reaction that forms the monolayer. Therefore, the oxygen used in this process has no opportunity to oxidize the underlying superconducting electrode.

Abstract translation: 用于超导隧道结的金属氧化物隧道势垒层通过原子层沉积形成。 两种前体包括金属（其可以是相同的金属或可以是不同的）。 第一种前体是具有与金属键合的金属醇盐，第二种前体是具有烷基反应性配体如卤素或甲基的无氧金属前体。 烷基反应性配体与醇盐的烷基反应，形成分离的副产物并留下金属氧化物单层。 选择温度以促进反应而不导致金属醇盐自分解。 在进入室之前，醇盐前体中的氧被结合到金属上，并且在形成单层的整个反应中保持结合。 因此，该方法中使用的氧气没有氧化下面的超导电极的机会。

公开(公告)号：US20150179914A1

公开(公告)日：2015-06-25

申请号：US14138692

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Frank Greer ,  Andy Steinbach ,  Wenxian Zhu

IPC: H01L39/24 ,  H01L39/02

CPC classification number: H01L23/53285 ,  H01L21/02123 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02356 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/76828 ,  H01L21/76891 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A interconnect structure for superconducting devices uses a material with a high melting point for the superconductive wiring; examples include refractory metals such as niobium. Because the wiring is tolerant of high temperatures, the interlayer dielectric (e.g., amorphous silicon with or without small amounts of passivants such as hydrogen or fluorine) may be subjected to rapid thermal annealing to reduce defects by driving off excess hydrogen, and optionally partially crystallizing the material.

Abstract translation: 用于超导装置的互连结构使用具有高熔点的材料用于超导布线; 实例包括难熔金属如铌。 由于布线耐高温，所以层间电介质（例如，具有或不含少量钝化剂如氢或氟的非晶硅）可以进行快速热退火，以通过排除多余的氢来降低缺陷，并且可选地部分结晶 材料。

公开(公告)号：US20150179487A1

公开(公告)日：2015-06-25

申请号：US14135307

申请日：2013-12-19

Applicant: Intermolecular, Inc.

Inventor： Chen-An Chen ,  Tony P. Chiang ,  Frank Greer ,  Martin Romero ,  James Tsung

IPC: H01L21/677 ,  H01L21/02

CPC classification number: H01L21/02271 ,  C23C16/04 ,  C23C16/45529 ,  C23C16/45544 ,  C23C16/45574 ,  C23C16/4584 ,  C23C16/54 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/6719 ,  H01L21/67207

Abstract: In some embodiments, apparatus are provided that provide for flexible processing in high productivity combinatorial (HPC) system. The apparatus allow for interchangeable functionality that includes deposition, plasma treatment, ion beam treatment, in-situ annealing, and in-situ metrology. The apparatus are designed so that the functionality may be integrated within a single processing chamber for enhanced flexibility.

Abstract translation: 在一些实施例中，提供了在高生产率组合（HPC）系统中提供灵活处理的装置。 该装置允许可互换的功能，包括沉积，等离子体处理，离子束处理，原位退火和原位计量。 该设备被设计为使得功能可以集成在单个处理室内以增强灵活性。

公开(公告)号：US20150176124A1

公开(公告)日：2015-06-25

申请号：US14135266

申请日：2013-12-19

Applicant: Intermolecular, Inc.

Inventor： Frank Greer ,  Khaled Ahmed ,  Chen-An Chen ,  Wenxian Zhu

IPC: C23C16/455 ,  C23C16/52

CPC classification number: C23C16/45551

Abstract: Systems and methods for rapid generation of ALD saturation curves using segmented spatial ALD are disclosed. Methods include introducing a substrate, having a plurality of substrate segment regions, into a processing chamber. The substrate may be disposed upon a pedestal within the chamber. Sequentially exposing the plurality of segment regions to a precursor within the chamber at a first processing temperature. Afterwards, purging the precursor from the chamber and then sequentially exposing each plurality of segment regions to a reactant within the chamber at the first processing temperature. Afterwards, purging the reactant from the chamber. Repeat sequentially exposing the plurality of segment regions to the precursor and the reactant for a plurality of cycles. Each segment region may be sequentially exposed to the precursor for a unique processing time. The pedestal may be rotated prior to exposing each next segment region to the precursor and the reactant.

Abstract translation: 公开了使用分段空间ALD快速产生ALD饱和曲线的系统和方法。 方法包括将具有多个衬底段区域的衬底引入处理室。 衬底可以设置在腔室内的基座上。 在第一处理温度下将多个区段区域顺序暴露于室内的前体。 然后，从室中吹扫前体，然后在第一处理温度下将每个多个区段顺序地暴露于室内的反应物。 之后，从反应室中清除反应物。 重复连续暴露多个段区域到前体和反应物多个循环。 每个段区域可以顺序地暴露于前体以获得独特的处理时间。 在将每个下一个区段暴露于前体和反应物之前，基座可以旋转。

公开(公告)号：US20150064361A1

公开(公告)日：2015-03-05

申请号：US14018112

申请日：2013-09-04

Applicant: Intermolecular Inc.

Inventor： Frank Greer ,  Amol Joshi ,  Kevin Kashefi

IPC: B05D3/06

CPC classification number: C23C16/45536 ,  C23C16/45527

Abstract: Irradiation with ultraviolet (UV) light during atomic layer deposition (ALD) can be used to cleave unwanted bonds on the layer being formed (e.g., trapped precursor ligands or process-gas molecules). Alternatively, the UV irradiation can be used to excite the targeted bonds so they may be more easily cleaved by other means. The use of UV may enable the formation of low-defect-density films at lower deposition temperatures (e.g.,

Abstract translation: 可以使用在原子层沉积（ALD）期间用紫外线（UV）光照射在所形成的层（例如，捕获的前体配体或工艺气体分子）上切割不需要的键。 或者，可以使用UV照射来激发目标键，使得它们可以通过其它方式更容易地被切割。 使用UV可以在较低的沉积温度（例如<250℃）下形成低缺陷密度的膜，或者减少对高温后沉积退火的需要，从而提高在热处理后形成的器件的质量， 敏感材料如锗。

公开(公告)号：US20140252565A1

公开(公告)日：2014-09-11

申请号：US14198480

申请日：2014-03-05

Applicant: Intermolecular, Inc.

Inventor： Frank Greer ,  Edwin Adhiprakasha ,  Chi-I Lang ,  Ratsamee Limdulpaiboon ,  Sandip Niyogi ,  Kurt Pang ,  J. Watanabe

IPC: H01L21/311 ,  H01L29/02

CPC classification number: H01L21/31122 ,  H01L21/02052 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02304 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/28255 ,  H01L29/02

Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.

Abstract translation: 制备含锗的半导体表面，用于通过（1）去除天然氧化物，例如通过湿法清洁来形成电介质覆盖层（例如，高k栅极电介质的薄层），（2）用氢物质进行额外的清洁 ，（3）原位形成受控单层的GeO 2，以及（4）电介质覆层的原位沉积，以防止天然氧化物的不受控制的再生长。 GeO2的单层促进电介质覆盖层的均匀成核，但它太薄而不能明显影响电介质覆盖层的有效氧化物厚度。

公开(公告)号：US20170186935A1

公开(公告)日：2017-06-29

申请号：US14982307

申请日：2015-12-29

Applicant: Intermolecular, Inc.

Inventor： Joseph Anthony Bonetti ,  Frank Greer ,  Wenxian Zhu

IPC: H01L39/24 ,  H01L21/285

CPC classification number: H01L39/2493 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L39/2406

Abstract: Provided are superconducting circuits and, more specifically, methods of forming such circuits. A method may involve forming a silicon-containing low loss dielectric (LLD) layer over a metal electrode such that metal carbides at the interface of the LLD layer and electrode. The LLD layer may be formed using chemical vapor deposition (CVD) at a temperature of less than about 500° C. At such a low temperature, metal silicides may not form even though silicon containing precursors may come in contact with metal of the electrode. Silicon containing precursors having silane molecules in which two silicon atoms bonded to each other (e.g., di-silane and tri-silane) may be used at these low temperatures. The LLD layer may include amorphous silicon, silicon oxide, or silicon nitride, and this layer may directly interface one or more metal electrodes. The thickness of LLD layer may be between about 1,000 Angstroms and 10,000 Angstroms.

公开(公告)号：US09455393B1

公开(公告)日：2016-09-27

申请号：US14981163

申请日：2015-12-28

Applicant: Intermolecular, Inc.

Inventor： Ashish Bodke ,  Frank Greer ,  Mark Clark

IPC: H01L29/06 ,  H01L29/08 ,  H01L39/24 ,  H01L39/02

CPC classification number: H01L39/2493 ,  H01L27/18

Abstract: Provided are superconducting circuits and method of forming thereof. A superconducting circuit may include a low loss dielectric (LLD) layer formed from one or both of polycrystalline silicon or polycrystalline germanium. The LLD layer may be formed at a low temperature (e.g., less than about 525° C.) using chemical vapor deposition (CVD). Addition of germanium may help to lower the deposition temperature and improve crystallinity of the resulting layer. The LLD layer is formed without adding silicides at the interface of the LLD layer and metal electrode. In some embodiments, an initial layer (e.g., a seed layer or a protective layer) may be formed on a metal electrode prior to forming the LLD layer. For example, the initial layer may include one of zinc sulfide, polycrystalline germanium, or polycrystalline silicon. The initial layer may be deposited at a low pressure (e.g., less than 10 Torr) to ensure higher levels of crystallinity.

Abstract translation: 提供超导电路及其形成方法。 超导电路可以包括由多晶硅或多晶锗中的一个或两者形成的低损耗电介质（LLD）层。 可以使用化学气相沉积（CVD）在低温（例如，小于约525℃）下形成LLD层。 添加锗可能有助于降低沉积温度并改善所得层的结晶度。 在LLD层和金属电极的界面处不添加硅化物形成LLD层。 在一些实施例中，可以在形成LLD层之前在金属电极上形成初始层（例如种子层或保护层）。 例如，初始层可以包括硫化锌，多晶锗或多晶硅中的一种。 初始层可以以低压（例如，小于10托）沉积以确保更高水平的结晶度。

公开(公告)号：US09312137B2

公开(公告)日：2016-04-12

申请号：US14068906

申请日：2013-10-31

Applicant: Intermolecular Inc.

Inventor： Frank Greer ,  Amol Joshi ,  Kevin Kashefi ,  Albert Sanghyup Lee ,  Abhijit Pethe ,  J Watanabe

IPC: H01L21/00 ,  H01L21/28 ,  H01L21/02 ,  C23C16/02 ,  C23C16/455

CPC classification number: H01L21/28158 ,  C23C16/0218 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/28238

Abstract: Native oxide growth on germanium, silicon germanium, and InGaAs undesirably affects CET (capacitive equivalent thickness) and EOT (effective oxide thickness) of high-k and low-k metal-oxide layers formed on these semiconductors. Even if pre-existing native oxide is initially removed from the bare semiconductor surface, some metal oxide layers are oxygen-permeable in thicknesses below about 25 Å thick. Oxygen-containing species used in the metal-oxide deposition process may diffuse through these permeable layers, react with the underlying semiconductor, and re-grow the native oxide. To eliminate or mitigate this re-growth, the substrate is exposed to a gas or plasma reductant (e.g., containing hydrogen). The reductant diffuses through the permeable layers to react with the re-grown native oxide, detaching the oxygen and leaving the un-oxidized semiconductor. The reduction product(s) resulting from the reaction may then be removed from the substrate (e.g., driven off by heat).

公开(公告)号：US20160093772A1

公开(公告)日：2016-03-31

申请号：US14501631

申请日：2014-09-30

Applicant: Intermolecular, Inc.

Inventor： Khaled Ahmed ,  Frank Greer ,  Andrew Steinbach

IPC: H01L33/32 ,  H01L33/40 ,  H01L33/00

CPC classification number: H01L33/325 ,  H01L33/0062 ,  H01L33/0095 ,  H01L33/14 ,  H01L2933/0016

Abstract: Provided are methods of forming low resistivity contacts. Also provided are devices having such low resistive contacts. A method may include doping the surface of a structure, such as a gallium nitride layer. Specifically, a dopant containing layer is formed on the surface of the structure using, for example, atomic layer deposition (ALD). The dopant may magnesium. In some embodiments, the dopant containing layer also includes nitrogen. A capping layer may be then formed over the dopant containing layer to prevent dopant desorption. The stack including the structure with the dopant containing layer disposed on its surface is then annealed to transfer dopant from the dopant containing layer into the surface. After annealing, any remaining dopant containing layer is removed. When another component is later formed over the surface, a low resistivity contact is created between this other component and the doped structure.

Abstract translation: 提供形成低电阻率接触的方法。 还提供了具有这种低电阻触点的装置。 一种方法可以包括掺杂诸如氮化镓层的结构的表面。 具体地，使用例如原子层沉积（ALD）在结构的表面上形成掺杂剂层。 掺杂剂可以是镁。 在一些实施例中，含掺杂剂层还包括氮。 然后可以在含掺杂剂层上形成覆盖层以防止掺杂剂解吸。 包括具有设置在其表面上的含掺杂剂层的结构的堆叠然后被退火以将掺杂剂从掺杂剂层转移到表面中。 退火后，除去任何剩余的含掺杂剂层。 当在表面上稍后形成另一个部件时，在该另一部件与掺杂结构之间产生低电阻接触。