公开(公告)号：US06803300B2

公开(公告)日：2004-10-12

申请号：US10314995

申请日：2002-12-10

申请人： Kazuyuki Higashi ,  Noriaki Matsunaga

发明人： Kazuyuki Higashi ,  Noriaki Matsunaga

IPC分类号： H01L2144

CPC分类号： H01L23/53252 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53228 ,  H01L23/53242 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes at least first and second lower layer wirings provided on a surface of an insulator on a semiconductor substrate, a first interlayer film provided on the insulator to cover surfaces of the first and second lower layer wirings, first and second connection wirings which are provided on the first interlayer film and include first and second films contacting the first and second lower layer wirings respectively, and a plate electrode which is continuously provided on the second connection wiring and includes at least the first film.

摘要翻译： 半导体器件至少包括设置在半导体衬底上的绝缘体的表面上的第一和第二下层布线，设置在绝缘体上以覆盖第一和第二下层布线的表面的第一层间膜，第一和第二连接布线， 设置在第一层间膜上，并且包括分别与第一和第二下层布线接触的第一和第二膜，以及连续设置在第二连接布线上并且至少包括第一膜的平板电极。

公开(公告)号：US06515365B2

公开(公告)日：2003-02-04

申请号：US09957020

申请日：2001-09-21

申请人： Kazuyuki Higashi ,  Noriaki Matsunaga

发明人： Kazuyuki Higashi ,  Noriaki Matsunaga

IPC分类号： H01L2352

CPC分类号： H01L23/53252 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53228 ,  H01L23/53242 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes at least first and second lower layer wirings provided on a surface of an insulator on a semiconductor substrate, a first interlayer film provided on the insulator to cover surfaces of the first and second lower layer wirings, first and second connection wirings which are provided on the first interlayer film and include first and second films contacting the first and second lower layer wirings respectively, and a plate electrode which is continuously provided on the second connection wiring and includes at least the first film.

公开(公告)号：US08614510B2

公开(公告)日：2013-12-24

申请号：US12726604

申请日：2010-03-18

申请人： Hideyuki Tomizawa ,  Noriaki Matsunaga ,  Tadayoshi Watanabe ,  Shiro Mishima ,  Masako Kodera

发明人： Hideyuki Tomizawa ,  Noriaki Matsunaga ,  Tadayoshi Watanabe ,  Shiro Mishima ,  Masako Kodera

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76826 ,  H01L21/3105 ,  H01L21/76832 ,  H01L21/76849 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes forming an insulating film including silicon, oxygen, carbon and hydrogen above a semiconductor substrate, forming a wiring trench in the insulating film, forming a metal film to be a metal wiring on the insulating film such that the metal film is provided in the wiring trench, forming the metal wiring by removing the metal film outside the wiring trench, performing a hydrophobic treatment to the surface of the insulating film after the forming the metal wiring, and forming a metal cap selectively on an upper surface of the metal wiring by plating after the performing the hydrophobic treatment.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底上形成包括硅，氧，碳和氢的绝缘膜，在绝缘膜中形成布线沟槽，在绝缘膜上形成金属膜作为金属布线，使得 金属膜设置在布线沟槽中，通过去除布线沟槽外的金属膜形成金属布线，在形成金属布线之后对绝缘膜的表面进行疏水处理，并在上部选择性地形成金属帽 在执行疏水处理之后通过电镀的金属布线的表面。

公开(公告)号：US20130093090A1

公开(公告)日：2013-04-18

申请号：US13707359

申请日：2012-12-06

申请人： Yumi HAYASHI ,  Atsuko Sakata ,  Kei Watanabe ,  Noriaki Matsunaga ,  Shinichi Nakao ,  Makoto Wada ,  Hiroshi Toyoda

发明人： Yumi HAYASHI ,  Atsuko Sakata ,  Kei Watanabe ,  Noriaki Matsunaga ,  Shinichi Nakao ,  Makoto Wada ,  Hiroshi Toyoda

IPC分类号： H01L23/485

CPC分类号： H01L23/485 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device, includes forming a dielectric film above a substrate; forming an opening in the dielectric film; forming a first film containing a metal whose energy for forming silicide thereof is lower than that of Cu silicide inside the opening; forming a second film that is conductive and contains copper (Cu) in the opening in which the first film containing the metal is formed; and forming a compound film containing Cu and silicon (Si) selectively on the second film in an atmosphere in which a temperature of the substrate is below 300° C.

摘要翻译： 一种制造半导体器件的方法，包括在衬底上形成电介质膜; 在电介质膜中形成开口; 形成含有其形成硅化物的能量低于开口内的硅化铜的能量的金属的第一膜; 在形成有含有金属的第一膜的开口中形成导电性并且含有铜（Cu）的第二膜; 以及在所述基板的温度低于300℃的气氛中，在所述第二膜上选择性地形成含有Cu和硅（Si）的复合膜。

公开(公告)号：US20120190212A1

公开(公告)日：2012-07-26

申请号：US13440480

申请日：2012-04-05

申请人： Seiji SAMUKAWA ,  Shigeo Yasuhara ,  Shingo Kadomura ,  Tsutomu Shimayama ,  Hisashi Yano ,  Kunitoshi Tajima ,  Noriaki Matsunaga ,  Masaki Yoshimaru

发明人： Seiji SAMUKAWA ,  Shigeo Yasuhara ,  Shingo Kadomura ,  Tsutomu Shimayama ,  Hisashi Yano ,  Kunitoshi Tajima ,  Noriaki Matsunaga ,  Masaki Yoshimaru

IPC分类号： H01L21/312 ,  C09D183/04

CPC分类号： H01L21/02126 ,  C23C16/401 ,  C23C16/486 ,  H01L21/02216 ,  H01L21/02277

摘要： Disclosed is a low dielectric constant insulating film formed of a polymer containing Si atoms, O atoms, C atoms, and H atoms, which includes straight chain molecules in which a plurality of basic molecules with an SiO structure are linked in a straight chain, binder molecules with an SiO structure linking a plurality of the straight chain molecules. The area ratio of a signal indicating a linear type SiO structure is 49% or more, and the signal amount of the signal indicating Si(CH3) is 66% or more.

摘要翻译： 公开了由包含Si原子，O原子，C原子和H原子的聚合物形成的低介电常数绝缘膜，其包括其中多个具有SiO结构的碱性分子在直链中键合的直链分子，粘合剂 具有连接多个直链分子的SiO结构的分子。 指示线性型SiO结构的信号的面积比为49％以上，表示Si（CH3）的信号的信号量为66％以上。

公开(公告)号：US20110233779A1

公开(公告)日：2011-09-29

申请号：US13052367

申请日：2011-03-21

申请人： Makoto Wada ,  Yosuke Akimoto ,  Yuichi Yamazaki ,  Masayuki Katagiri ,  Noriaki Matsunaga ,  Tadashi Sakai ,  Naoshi Sakuma

发明人： Makoto Wada ,  Yosuke Akimoto ,  Yuichi Yamazaki ,  Masayuki Katagiri ,  Noriaki Matsunaga ,  Tadashi Sakai ,  Naoshi Sakuma

IPC分类号： H01L23/532 ,  H01L21/28 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： H01L23/5226 ,  B82Y10/00 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/53238 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes an interlayer insulation film provided on a substrate including a Cu wiring, a via hole formed in the interlayer insulation film on the Cu wiring, a first metal film selectively formed on the Cu wiring in the via hole, functioning as a barrier to the Cu wiring, and functioning as a promoter of carbon nanotube growth, a second metal film formed at least on the first metal film in the via hole, and functioning as a catalyst of the carbon nanotube growth, and carbon nanotubes buried in the via hole in which the first metal film and the second metal film are formed.

摘要翻译： 根据一个实施例，半导体器件包括设置在包括Cu布线的基板上的层间绝缘膜，形成在Cu布线上的层间绝缘膜中的通孔，选择性地形成在通孔中的Cu布线上的第一金属膜 作为Cu布线的屏障，起到碳纳米管生长的促进剂的功能，至少在通孔中的第一金属膜上形成的第二金属膜，并且用作碳纳米管生长的催化剂，碳 埋藏在其中形成有第一金属膜和第二金属膜的通孔中的纳米管。

公开(公告)号：USRE41948E1

公开(公告)日：2010-11-23

申请号：US12198680

申请日：2008-08-26

申请人： Noriaki Matsunaga

发明人： Noriaki Matsunaga

IPC分类号： H01L23/48

CPC分类号： H01L23/53295 ,  H01L23/3192 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided with a first insulating film, a first wiring layer formed in the first insulating film, a second insulating film formed above the first wiring layer and the first insulating film, the second insulating film including a low dielectric constant film, a second wiring layer formed in the second insulating film and coupled to the first wiring layer through a first connection section, and a third insulating film formed above the second wiring layer and the second insulating film and serving as one of an interlayer insulating film and a passivation film, and at least one of the first and third insulating films being one of a film formed mainly of SiON, a film formed mainly of SiN, and a laminated film being the films formed mainly of SiON or SiN respectively.

摘要翻译： 半导体器件设置有第一绝缘膜，形成在第一绝缘膜中的第一布线层，形成在第一布线层和第一绝缘膜之上的第二绝缘膜，第二绝缘膜包括低介电常数膜， 第二布线层，形成在第二绝缘膜中，并通过第一连接部分耦合到第一布线层;以及第三绝缘膜，形成在第二布线层和第二绝缘膜之上，并且用作层间绝缘膜和钝化层之一 膜，并且第一和第三绝缘膜中的至少一个是主要由SiON形成的膜之一，主要由SiN形成的膜，以及分别是主要由SiON或SiN形成的膜的层叠膜。

公开(公告)号：US07764235B2

公开(公告)日：2010-07-27

申请号：US12182696

申请日：2008-07-30

申请人： Noriaki Matsunaga

发明人： Noriaki Matsunaga

IPC分类号： H01Q1/38 ,  H01Q9/28

CPC分类号： H01Q7/00 ,  H01L23/48 ,  H01L23/49838 ,  H01L23/5227 ,  H01L23/552 ,  H01L23/66 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q9/16 ,  H01L2924/00

摘要： A semiconductor device includes a first level layer, a transmitting antenna provided on the first level layer and extending in a first direction, a receiving antenna provided on the first level layer and extending in the first direction, and a plurality of first wiring portions provided on the first level layer and extending in a second direction that makes an angle of 45 to 90 degrees with respect to the first direction.

摘要翻译： 一种半导体器件，包括：第一层，设置在第一层上并沿第一方向延伸的发射天线;设置在第一层上并沿第一方向延伸的接收天线;以及多个第一布线部， 第一层并且沿相对于第一方向形成45度至90度角的第二方向延伸。

公开(公告)号：US07691740B2

公开(公告)日：2010-04-06

申请号：US12250772

申请日：2008-10-14

申请人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

发明人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

IPC分类号： H01L21/4763

CPC分类号： H01L21/02115 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76822 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76835

摘要： The semiconductor device fabrication method according the present invention having, forming an interlayer dielectric film containing carbon above a semiconductor substrate, forming a protective film on that portion of the interlayer dielectric film, which is close to the surface and in which the carbon concentration is low, forming a trench by selectively removing a desired region of the interlayer dielectric film and protective film, such that the region extends from the surface of the protective film to the bottom surface of the interlayer dielectric film, supplying carbon to the interface between the interlayer dielectric film and protective film, and forming a conductive layer by burying a conductive material in the trench.

摘要翻译： 根据本发明的半导体器件制造方法，在半导体衬底上形成含有碳的层间电介质膜，在层间电介质膜的与表面接近的部分形成保护膜，其中碳浓度低 通过选择性地去除层间电介质膜和保护膜的期望区域形成沟槽，使得该区域从保护膜的表面延伸到层间电介质膜的底表面，将碳供应到层间电介质 膜和保护膜，并且通过在沟槽中埋入导电材料形成导电层。

公开(公告)号：US07339256B2

公开(公告)日：2008-03-04

申请号：US10974922

申请日：2004-10-28

申请人： Naofumi Nakamura ,  Noriaki Matsunaga ,  Sachiyo Ito ,  Masahiko Hasunuma ,  Takeshi Nishioka

发明人： Naofumi Nakamura ,  Noriaki Matsunaga ,  Sachiyo Ito ,  Masahiko Hasunuma ,  Takeshi Nishioka

IPC分类号： H01L29/72

CPC分类号： H01L23/564 ,  H01L23/522 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first insulating layer provided above a semiconductor substrate. The first insulating layer includes a layer consisting essentially of a material having a relative dielectric constant smaller than 3. The first insulating layer includes a first integral structure consisting of a plug and wiring. The upper surface of the wiring is flush with the upper surface of the first insulating layer, and the lower surface of the plug is flush with the lower surface of the first insulating layer. A region protective member is formed of a second integral structure consisting of a plug and wiring. The second integral structure extends from the upper surface of the first insulating layer to the lower surface of the first insulating layer. The region protective member surrounds one of first to n-th regions (n being a natural 2 or more) partitioned by a boundary region on a horizontal plane.

摘要翻译： 半导体器件包括设置在半导体衬底之上的第一绝缘层。 第一绝缘层包括基本上由相对介电常数小于3的材料组成的层。第一绝缘层包括由插头和布线组成的第一整体结构。 布线的上表面与第一绝缘层的上表面齐平，插头的下表面与第一绝缘层的下表面齐平。 区域保护构件由由插头和布线组成的第二整体结构形成。 第二整体结构从第一绝缘层的上表面延伸到第一绝缘层的下表面。 区域保护构件围绕由水平面上的边界区划分的第一至第n区域（n为自然2以上）中的一个。