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    Wafer-to-wafer alignments
    23.
    发明授权
    Wafer-to-wafer alignments 失效
    晶圆对晶圆对准

    公开(公告)号：US08004289B2

    公开(公告)日：2011-08-23

    申请号：US12198221

    申请日：2008-08-26

    申请人： Thomas Joseph Dalton ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Stephen Ellinwood Luce ,  Edmund Juris Sprogis

    发明人： Thomas Joseph Dalton ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Stephen Ellinwood Luce ,  Edmund Juris Sprogis

    IPC分类号： G01R27/26 ,  G01R31/308

    CPC分类号： H01L23/544 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/54453 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Structures for aligning wafers and methods for operating the same. The structure includes (a) a first semiconductor wafer including a first capacitive coupling structure, and (b) a second semiconductor wafer including a second capacitive coupling structure. The first and second semiconductor wafers are in direct physical contact with each other via a common surface. If the first and second semiconductor wafers are moved with respect to each other by a first displacement distance of 1 nm in a first direction while the first and second semiconductor wafers are in direct physical contact with each other via the common surface, then a change of at least 10−18 F in capacitance of a first capacitor comprising the first and second capacitive coupling structures results. The first direction is essentially parallel to the common surface.

    摘要翻译： 用于对准晶片的结构及其操作方法。 该结构包括（a）包括第一电容耦合结构的第一半导体晶片和（b）包括第二电容耦合结构的第二半导体晶片。 第一和第二半导体晶片经由公共表面彼此直接物理接触。 如果第一和第二半导体晶片在第一方向上相对于彼此移动了1nm的第一位移距离，同时第一和第二半导体晶片经由公共表面彼此直接物理接触，则 包括第一和第二电容耦合结构的第一电容器的电容的至少10-18F的结果。 第一个方向基本上平行于共同的表面。

    WAFER-TO-WAFER ALIGNMENTS
    24.
    发明申请
    WAFER-TO-WAFER ALIGNMENTS 失效
    WAFER-WAFER对准

    公开(公告)号：US20080308948A1

    公开(公告)日：2008-12-18

    申请号：US12198221

    申请日：2008-08-26

    申请人： Thomas Joseph Dalton ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Stephen Ellinwood Luce ,  Edmund Juris Sprogis

    发明人： Thomas Joseph Dalton ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Stephen Ellinwood Luce ,  Edmund Juris Sprogis

    IPC分类号： H01L23/52 ,  H01L21/66

    CPC分类号： H01L23/544 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/54453 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Structures for aligning wafers and methods for operating the same. The structure includes (a) a first semiconductor wafer including a first capacitive coupling structure, and (b) a second semiconductor wafer including a second capacitive coupling structure. The first and second semiconductor wafers are in direct physical contact with each other via a common surface. If the first and second semiconductor wafers are moved with respect to each other by a first displacement distance of 1 nm in a first direction while the first and second semiconductor wafers are in direct physical contact with each other via the common surface, then a change of at least 10−18 F in capacitance of a first capacitor comprising the first and second capacitive coupling structures results. The first direction is essentially parallel to the common surface.

    摘要翻译： 用于对准晶片的结构及其操作方法。 该结构包括（a）包括第一电容耦合结构的第一半导体晶片和（b）包括第二电容耦合结构的第二半导体晶片。 第一和第二半导体晶片经由公共表面彼此直接物理接触。 如果第一和第二半导体晶片在第一方向上相对于彼此移动了1nm的第一位移距离，同时第一和第二半导体晶片经由公共表面彼此直接物理接触，则 包括第一和第二电容耦合结构的第一电容器的电容的至少10-18F的结果。 第一个方向基本上平行于共同的表面。

    CMOS sensors having charge pushing regions
    25.
    发明授权
    CMOS sensors having charge pushing regions 失效
    CMOS传感器具有电荷推送区域

    公开(公告)号：US07492048B2

    公开(公告)日：2009-02-17

    申请号：US11275497

    申请日：2006-01-10

    申请人： James William Adkisson ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Jeffrey Bowman Johnson ,  Jerome Brett Lasky ,  Richard John Rassel

    发明人： James William Adkisson ,  Jeffrey Peter Gambino ,  Mark David Jaffe ,  Jeffrey Bowman Johnson ,  Jerome Brett Lasky ,  Richard John Rassel

    IPC分类号： H01L31/062

    CPC分类号： H01L27/1462 ,  H01L27/14603 ,  H01L27/1463

    摘要： Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.

    摘要翻译： 结构及其形成方法。 该半导体结构包括包含第一半导体区域和第二半导体区域的光电二极管。 第一和第二半导体区域分别掺杂有第一和第二掺杂极性，并且第一和第二掺杂极性相反。 半导体结构还包括传输门，其包括（i）第一延伸区，（ii）第二延伸区和（iii）浮动扩散区。 第一和第二延伸区分别与光电二极管和浮动扩散区直接物理接触。 半导体结构还包括电荷推送区域。 电荷推送区域与第一半导体区域重叠，并且不与浮动扩散区域重叠。 电荷推送区域包括透明且导电的材料。

    Structures, design structures and methods of fabricating global shutter pixel sensor cells
    26.
    发明授权
    Structures, design structures and methods of fabricating global shutter pixel sensor cells 有权
    制造全局快门像素传感器单元的结构，设计结构和方法

    公开(公告)号：US08138531B2

    公开(公告)日：2012-03-20

    申请号：US12561581

    申请日：2009-09-17

    申请人： James William Adkisson ,  John Joseph Ellis-Monaghan ,  Mark David Jaffe ,  Richard John Rassel

    发明人： James William Adkisson ,  John Joseph Ellis-Monaghan ,  Mark David Jaffe ,  Richard John Rassel

    IPC分类号： H01L31/113

    CPC分类号： H01L27/14609 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

    摘要： Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.

    摘要翻译： 像素传感器单元，制造像素传感器单元的方法和像素传感器单元的设计结构。 所述像素传感器单元包括：在半导体层的第一区域中的光电二极管主体; 半导体层的第二区域中的浮动扩散节点，位于第一和第二区域之间并邻接第一和第二区域的半导体层的第三区域; 以及在所述半导体层中的绝缘隔离，围绕所述第一，第二和第三区域的介电隔离，所述介质隔离邻接所述第一，第二和第三区域以及所述光电二极管主体，所述介电隔离件不邻接所述浮动扩散节点，所述第二 介于介电隔离和浮动扩散节点之间的区域。

    STRUCTURES, DESIGN STRUCTURES AND METHODS OF FABRICATING GLOBAL SHUTTER PIXEL SENSOR CELLS
    27.
    发明申请
    STRUCTURES, DESIGN STRUCTURES AND METHODS OF FABRICATING GLOBAL SHUTTER PIXEL SENSOR CELLS 有权
    制作全球快门像素传感器细胞的结构，设计结构和方法

    公开(公告)号：US20110062542A1

    公开(公告)日：2011-03-17

    申请号：US12561581

    申请日：2009-09-17

    申请人： James William Adkisson ,  John Joseph Ellis-Monaghan ,  Mark David Jaffe ,  Richard John Rassel

    发明人： James William Adkisson ,  John Joseph Ellis-Monaghan ,  Mark David Jaffe ,  Richard John Rassel

    IPC分类号： H01L31/12 ,  H01L31/18 ,  G06F17/50

    CPC分类号： H01L27/14609 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

    摘要： Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.

    摘要翻译： 像素传感器单元，制造像素传感器单元的方法和像素传感器单元的设计结构。 所述像素传感器单元包括：在半导体层的第一区域中的光电二极管主体; 半导体层的第二区域中的浮动扩散节点，位于第一和第二区域之间并邻接第一和第二区域的半导体层的第三区域; 以及在所述半导体层中的绝缘隔离，围绕所述第一，第二和第三区域的介电隔离，所述介质隔离邻接所述第一，第二和第三区域以及所述光电二极管主体，所述介电隔离件不邻接所述浮动扩散节点，所述第二 介于介电隔离和浮动扩散节点之间的区域。