公开(公告)号：US08796661B2

公开(公告)日：2014-08-05

申请号：US12917348

申请日：2010-11-01

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu

IPC分类号： H01L47/00 ,  H01L21/06 ,  H01L21/20

CPC分类号： H01L45/085 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/14 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1683

摘要： A method of forming a nonvolatile memory cell includes forming a first electrode having a first current conductive material and a circumferentially self-aligned second current conductive material projecting elevationally outward from the first current conductive material. The second current conductive material is different in composition from the first current conductive material. A programmable region is formed over the first current conductive material and over the projecting second current conductive material of the first electrode. A second electrode is formed over the programmable region. In one embodiment, the programmable region is ion conductive material, and at least one of the first and second electrodes has an electrochemically active surface directly against the ion conductive material. Other method and structural aspects are disclosed.

摘要翻译： 形成非易失性存储单元的方法包括形成具有第一电流导电材料的第一电极和从第一电流导电材料向外突出的周向自对准的第二导电材料。 第二电流导电材料的组成不同于第一电流导电材料。 可编程区域形成在第一电流导电材料之上并且在第一电极的突出的第二电流导电材料之上。 在可编程区域上形成第二电极。 在一个实施例中，可编程区域是离子传导材料，并且第一和第二电极中的至少一个电极具有直接抵靠离子导电材料的电化学活性表面。 公开了其它方法和结构方面。

公开(公告)号：US08637113B2

公开(公告)日：2014-01-28

申请号：US13354163

申请日：2012-01-19

申请人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

IPC分类号： C23C18/00 ,  C23C20/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06

CPC分类号： H01L27/101 ,  H01L21/0271 ,  Y10S438/947

摘要： A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

摘要翻译： 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

公开(公告)号：US20130188903A1

公开(公告)日：2013-07-25

申请号：US13354767

申请日：2012-01-20

申请人： Gurtej Sandhu ,  Roy Meade

发明人： Gurtej Sandhu ,  Roy Meade

IPC分类号： G02B6/12 ,  H01L21/02

CPC分类号： G02B6/12 ,  B82Y20/00 ,  G02B6/122 ,  G02B6/1223 ,  G02B6/1225 ,  G02B6/13 ,  G02B2006/121 ,  H01L2933/0083

摘要： A photonic device and methods of formation that provide an area providing reduced optical coupling between a substrate and an inner core of the photonic device are described. The area is formed using holes in the inner core and an outer cladding. The holes may be filled with materials which provide a photonic crystal. Thus, the photonic device may function as a waveguide and as a photonic crystal.

摘要翻译： 描述了提供在光子器件的衬底和内核之间提供减小的光学耦合的区域的光子器件和形成方法。 该区域由内芯和外包层中的孔形成。 孔可以填充提供光子晶体的材料。 因此，光子器件可以用作波导和光子晶体。

公开(公告)号：US08476140B2

公开(公告)日：2013-07-02

申请号：US13352833

申请日：2012-01-18

申请人： Gurtej Sandhu ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  Bhaskar Srinivasan

IPC分类号： H01L21/8222 ,  H01L21/20

CPC分类号： H01L29/24 ,  H01L27/24 ,  H01L45/00

摘要： A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.

摘要翻译： 包括二极管的二极管和存储器件，其中二极管包括导电部分和由第一材料形成的另一部分，该第一材料具有允许在向材料施加电压时第一次降低材料的电阻率的特性，从而允许电流 流过其中，并且具有允许第一材料的电阻率响应于第一材料的温度升高而第二次降低的特征。

公开(公告)号：US08450154B2

公开(公告)日：2013-05-28

申请号：US13087050

申请日：2011-04-14

申请人： Jun Liu ,  Gurtej Sandhu

发明人： Jun Liu ,  Gurtej Sandhu

IPC分类号： H01L21/82

CPC分类号： H01L45/145 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1683

摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming an oxide based memory cell. Forming an oxide based memory cell can include forming a first conductive element, forming a substoichiometric oxide over the first conductive element, forming a second conductive element over the substoichiometric oxide, and oxidizing edges of the substoichiometric oxide by subjecting the substoichiometric oxide to an oxidizing environment to define a controlled oxygen vacancy conduction path near a center of the oxide.

摘要翻译： 与基于氧化物的存储器相关联的方法，装置和系统可以包括形成基于氧化物的存储器单元的方法。 形成基于氧化物的存储单元可以包括形成第一导电元件，在第一导电元件上形成亚化学计量氧化物，在亚化学计量氧化物上形成第二导电元件，以及通过使亚化学计量氧化物氧化成氧化环境来氧化亚化学计量氧化物的边缘 以限定氧化物中心附近的受控氧空位传导路径。

公开(公告)号：US08358531B2

公开(公告)日：2013-01-22

申请号：US13357527

申请日：2012-01-24

申请人： Jun Liu ,  Gurtej Sandhu

发明人： Jun Liu ,  Gurtej Sandhu

IPC分类号： G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  G11C11/02

CPC分类号： G11C11/1675 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1695 ,  H01L43/02

摘要： Spin torque transfer magnetic random access memory devices configured to be programmed unidirectionally and methods of programming such devices. The devices include memory cells having two pinned layers and a free layer therebetween. By utilizing two pinned layers, the spin torque effect on the free layer from each of the two pinned layers, respectively, allows the memory cells to be programmed with unidirectional currents.

摘要翻译： 配置为单向编程的自旋扭矩传递磁性随机存取存储器件以及编程这种器件的方法。 这些装置包括具有两个钉扎层和其间的自由层的存储单元。 通过利用两个固定层，分别从两个固定层中的每一个自由层上的自旋转矩效应允许以单向电流编程存储器单元。

公开(公告)号：US20130005143A1

公开(公告)日：2013-01-03

申请号：US13616080

申请日：2012-09-14

申请人： Nishant Sinha ,  Gurtej Sandhu ,  Neil Greeley ,  John Smythe

发明人： Nishant Sinha ,  Gurtej Sandhu ,  Neil Greeley ,  John Smythe

IPC分类号： H01L21/28 ,  B82Y40/00

CPC分类号： H01L23/5222 ,  H01L21/7682 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a method of forming it are disclosed in which at least two adjacent conductors have an air-gap insulator between them which is covered by nanoparticles of insulating material being a size which prevent the nanoparticles from substantially entering into the air-gap.

摘要翻译： 公开了半导体器件及其形成方法，其中至少两个相邻的导体在它们之间具有空隙绝缘体，其被绝缘材料的纳米颗粒覆盖，其尺寸是防止纳米颗粒基本上进入气隙的尺寸。

公开(公告)号：US08343828B2

公开(公告)日：2013-01-01

申请号：US13305072

申请日：2011-11-28

申请人： Gurtej Sandhu ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  Bhaskar Srinivasan

IPC分类号： H01L21/8234

CPC分类号： H01L21/04 ,  H01L27/1021 ,  H01L27/2418 ,  H01L29/1606 ,  H01L45/00

摘要： Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.

公开(公告)号：US20120326242A1

公开(公告)日：2012-12-27

申请号：US13605511

申请日：2012-09-06

申请人： Gurtej Sandhu ,  John K. Zahurak ,  Jay Parks

发明人： Gurtej Sandhu ,  John K. Zahurak ,  Jay Parks

IPC分类号： H01L27/088

CPC分类号： H01L27/2454 ,  H01L27/2463 ,  H01L29/7827 ,  H01L45/06 ,  H01L45/1233

摘要： A vertical semiconductor material mesa upstanding from a semiconductor base that forms a conductive channel between first and second doped regions. The first doped region is electrically coupled to one or more first silicide layers on the surface of the base. The second doped region is electrically coupled to one of a plurality of second silicide layers on the upper surface of the mesa. A gate conductor is provided on one or more sidewalls of the mesa.

公开(公告)号：US20120261638A1

公开(公告)日：2012-10-18

申请号：US13086321

申请日：2011-04-13

申请人： Scott E. Sills ,  Gurtej Sandhu

发明人： Scott E. Sills ,  Gurtej Sandhu

IPC分类号： H01L45/00

CPC分类号： H01L45/1226 ,  H01L27/2463 ,  H01L27/249 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/122 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147

摘要： This disclosure provides embodiments for the formation of vertical memory cell structures that may be implemented in RRAM devices. In one embodiment, memory cell area may be increased by varying word line height and/or word line interface surface characteristics to ensure the creation of a grain boundary that is suitable for formation of conductive pathways through an active layer of an RRAM memory cell. This may maintain continuum behavior while reducing random cell-to-cell variability that is often encountered at nanoscopic scales. In another embodiment, such vertical memory cell structures may be formed in multiple-tiers to define a three-dimensional RRAM memory array. Further embodiments also provide a spacer pitch-doubled RRAM memory array that integrates vertical memory cell structures.

摘要翻译： 本公开提供了可以在RRAM设备中实现的垂直存储器单元结构的形成的实施例。 在一个实施例中，可以通过改变字线高度和/或字线界面表面特性来增加存储器单元面积，以确保产生适于通过RRAM存储器单元的有源层形成导电路径的晶界。 这可以保持连续体行为，同时减少在纳米尺度上经常遇到的随机细胞间变异性。 在另一实施例中，这样的垂直存储单元结构可以以多层形成以定义三维RRAM存储器阵列。 另外的实施例还提供了一种集成垂直存储单元结构的间隔物间距加倍的RRAM存储器阵列。