公开(公告)号：US20060172474A1

公开(公告)日：2006-08-03

申请号：US11045124

申请日：2005-01-31

申请人： Cory Wajda ,  Gert Leusink

发明人： Cory Wajda ,  Gert Leusink

IPC分类号： H01L21/84 ,  H01L21/26 ,  H01L21/425

CPC分类号： H01L21/02321 ,  H01L21/02123 ,  H01L21/02175 ,  H01L21/0234 ,  H01L21/28079 ,  H01L21/316 ,  H01L29/495

摘要： A method for treating a gate stack in the fabrication of a semiconductor device by providing a substrate containing a gate stack having a dielectric layer formed on the substrate and a metal-containing gate electrode layer formed on the high-k dielectric layer, forming low-energy excited dopant species from a process gas in a plasma, and exposing the gate stack to the excited dopant species to incorporate a dopant into the gate stack. The method can be utilized to tune the workfunction of the gate stack.

摘要翻译： 一种在制造半导体器件中处理栅叠层的方法，其特征在于，提供一种基板，该基板含有形成在基板上的电介质层的栅叠层和形成在高k电介质层上的含金属的栅电极层， 来自等离子体中的工艺气体的能量激发的掺杂剂物质，并且将栅极堆叠暴露于激发的掺杂物种类以将掺杂剂掺入到栅极堆叠中。 该方法可用于调整栅极堆叠的功能。

公开(公告)号：US08722548B2

公开(公告)日：2014-05-13

申请号：US12890051

申请日：2010-09-24

申请人： Shintaro Aoyama ,  Robert D. Clark ,  Steven P. Consiglio ,  Marinus Hopstaken ,  Hemanth Jagannathan ,  Paul Charles Jamison ,  Gert Leusink ,  Barry Paul Linder ,  Vijay Narayanan ,  Cory Wajda

发明人： Shintaro Aoyama ,  Robert D. Clark ,  Steven P. Consiglio ,  Marinus Hopstaken ,  Hemanth Jagannathan ,  Paul Charles Jamison ,  Gert Leusink ,  Barry Paul Linder ,  Vijay Narayanan ,  Cory Wajda

IPC分类号： H01L21/469

CPC分类号： H01L21/02181 ,  B32B15/04 ,  B32B2457/14 ,  C23C16/40 ,  C23C16/401 ,  C23C16/405 ,  C23C16/45527 ,  C23C16/45531 ,  C23C16/56 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/28194 ,  H01L29/517

摘要： In one exemplary embodiment, a method includes: forming at least one first monolayer of first material on a surface of a substrate by performing a first plurality of cycles of atomic layer deposition; thereafter, annealing the formed at least one first monolayer of first material under a first inert atmosphere at a first temperature between about 650° C. and about 900° C.; thereafter, forming at least one second monolayer of second material by performing a second plurality of cycles of atomic layer deposition, where the formed at least one second monolayer of second material at least partially overlies the annealed at least one first monolayer of first material; and thereafter, annealing the formed at least one second monolayer of second material under a second inert atmosphere at a second temperature between about 650° C. and about 900° C.

摘要翻译： 在一个示例性实施例中，一种方法包括：通过执行原子层沉积的第一多个循环，在衬底的表面上形成至少一个第一材料的第一单层; 之后，在第一惰性气氛下，在约650℃至约900℃的第一温度下退火所形成的至少一个第一材料的第一单层; 此后，通过执行第二多个原子层沉积循环形成第二材料的至少一个第二单层，其中所形成的至少一个第二单层的第二材料至少部分地覆盖所述退火的至少一个第一单层第一材料; 然后在第二惰性气氛下，在约650℃和约900℃之间的第二温度下对所形成的至少一个第二单层第二材料进行退火。

公开(公告)号：US20070077701A1

公开(公告)日：2007-04-05

申请号：US11239321

申请日：2005-09-30

申请人： David O'Meara ,  YoungJong Lee ,  Cory Wajda

发明人： David O'Meara ,  YoungJong Lee ,  Cory Wajda

IPC分类号： H01L21/8242 ,  H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L21/28194 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31122 ,  H01L29/517 ,  H01L29/78

摘要： A method is provided for reducing the metal content and controlling the metal depth profile of a gate dielectric layer in a gate stack. The method includes providing a substrate in a process chamber, depositing a gate dielectric layer on the substrate, where the gate dielectric layer includes a metal element. The metal element is selectively etched from at least a portion of the gate dielectric layer to form an etched gate dielectric layer with reduced metal content, and a gate electrode layer is formed on the etched gate dielectric layer.

摘要翻译： 提供了一种用于降低金属含量并控制栅叠层中的栅介质层的金属深度分布的方法。 该方法包括在处理室中提供衬底，在衬底上沉积栅极电介质层，其中栅极电介质层包括金属元素。 从栅介质层的至少一部分选择性地蚀刻金属元件，以形成具有降低的金属含量的蚀刻栅极电介质层，并且在蚀刻的栅极介电层上形成栅极电极层。

公开(公告)号：US20050217799A1

公开(公告)日：2005-10-06

申请号：US10813119

申请日：2004-03-31

申请人： David O'Meara ,  Gerrit Leusink ,  Stephen Cabral ,  Anthony Dip ,  Cory Wajda ,  Raymond Joe

发明人： David O'Meara ,  Gerrit Leusink ,  Stephen Cabral ,  Anthony Dip ,  Cory Wajda ,  Raymond Joe

IPC分类号： C23F1/00 ,  H01L21/00

CPC分类号： H01L21/67109 ,  H01J2237/2001

摘要： A wafer heating assembly is described having a unique heater element for use in a single wafer processing systems. The heating unit includes a carbon wire element encased in a quartz sheath. The heating unit is as contamination-free as the quartz, which permits direct contact to the wafer. The mechanical flexibility of the carbon ‘wire’ or ‘braided’ structure permits a coil configuration, which permits independent heater zone control across the wafer. The multiple independent heater zones across the wafer can permit temperature gradients to adjust film growth/deposition uniformity and rapid thermal adjustments with film uniformity superior to conventional single wafer systems and with minimum to no wafer warping. The low thermal mass permits a fast thermal response that enables a pulsed or digital thermal process that results in layer-by-layer film formation for improved thin film control.

摘要翻译： 描述了具有用于单个晶片处理系统的唯一加热器元件的晶片加热组件。 加热单元包括封装在石英鞘中的碳线元件。 加热单元与石英无污染，允许直接接触晶片。 碳线或“编织”结构的机械灵活性允许线圈构造，其允许跨晶片的独立加热器区域控制。 跨晶片的多个独立的加热器区域可以允许温度梯度调节膜生长/沉积均匀性和快速的热调节，其膜均匀性优于常规单晶片系统，并且最小至无晶片翘曲。 低热质量允许快速的热响应，其实现脉冲或数字热处理，其导致逐层成膜以改善薄膜控制。

公开(公告)号：US20050214445A1

公开(公告)日：2005-09-29

申请号：US10811574

申请日：2004-03-29

申请人： Cory Wajda ,  David O'Meara

发明人： Cory Wajda ,  David O'Meara

IPC分类号： B05C11/00 ,  B05D1/00 ,  C23C16/00 ,  C23C16/52 ,  H01C17/065 ,  H01C17/075 ,  H01L21/00

CPC分类号： H01L21/67253 ,  C23C16/52 ,  H01C17/065 ,  H01C17/075

摘要： A method and system for monitoring coating status of a ceramic substrate heater in a process chamber. The method includes heating a ceramic substrate heater to a desired temperature, exposing the ceramic substrate heater to a reactant gas during a process, and monitoring optical emission from the heated ceramic substrate heater to determine coating status of the ceramic substrate heater. Processes that can be monitored include a chamber cleaning process and a chamber conditioning process.

摘要翻译： 一种用于监测处理室中的陶瓷衬底加热器的涂覆状态的方法和系统。 该方法包括将陶瓷衬底加热器加热至所需温度，在工艺过程中将陶瓷衬底加热器暴露于反应气体，以及监测来自加热的陶瓷衬底加热器的光发射以确定陶瓷衬底加热器的涂层状态。 可以监测的过程包括室清洁过程和室调节过程。

公开(公告)号：US20110065287A1

公开(公告)日：2011-03-17

申请号：US12557771

申请日：2009-09-11

申请人： Cory Wajda

发明人： Cory Wajda

IPC分类号： H01L21/314

CPC分类号： H01L21/02148 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/31645

摘要： A method is provided for forming a metal-silicon-containing film on a substrate by pulsed chemical vapor deposition. The method includes providing the substrate in a process chamber, maintaining the substrate at a temperature suited for chemical vapor deposition of a metal-silicon-containing film by thermal decomposition of a metal-containing gas and a silicon-containing gas on the substrate, exposing the substrate to a continuous flow of the metal-containing gas, and during the continuous flow, exposing the substrate to sequential pulses of the silicon-containing gas.

摘要翻译： 提供了通过脉冲化学气相沉积在基板上形成含金属硅膜的方法。 该方法包括在处理室中提供衬底，通过在衬底上热分解含金属气体和含硅气体，将衬底保持在适于化学气相沉积含金属硅膜的温度，将衬底暴露 该衬底连续流入含金属的气体，并且在连续流动期间，将衬底暴露于含硅气体的顺序脉冲。

公开(公告)号：US20050070104A1

公开(公告)日：2005-03-31

申请号：US10674703

申请日：2003-09-30

申请人： David O'Meara ,  Daniel Burdett ,  Stephen Cabral ,  Gert Leusink ,  John Kostenko ,  Cory Wajda

发明人： David O'Meara ,  Daniel Burdett ,  Stephen Cabral ,  Gert Leusink ,  John Kostenko ,  Cory Wajda

IPC分类号： H01L21/00 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/67276 ,  B81C99/0065 ,  B81C2201/0138 ,  H01L21/67253

摘要： A method and system for monitoring status of a system component during a process. The method includes exposing a system component to a reactant gas during a process, where the reactant gas is capable of etching the system component material to form an erosion product, and monitoring release of the erosion product during the process to determine status of the system component. Processes that can be monitored include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, an injector, a substrate holder, a liner, a pedestal, a cap cover, an electrode, and a heater, any of which can further include a protective coating. The processing system includes the system component in a process chamber, a gas injection system for introducing the reactant gas, a chamber protection system for monitoring the status of the system component, and a controller for controlling the processing system in response to the status.

摘要翻译： 一种在过程中监视系统组件的状态的方法和系统。 该方法包括在过程期间将系统组分暴露于反应气体，其中反应气体能够蚀刻系统组分材料以形成侵蚀产物，并且在该过程期间监测侵蚀产物的释放以确定系统部件的状态 。 可以监测的方法包括室清洁过程，室调节过程，基板蚀刻工艺和基板成膜工艺。 系统组件可以是消耗系统部件，例如处理管，屏蔽件，环，挡板，注射器，衬底保持器，衬垫，基座，帽盖，电极和加热器 其可以进一步包括保护涂层。 处理系统包括处理室中的系统部件，用于引入反应气体的气体注入系统，用于监视系统部件的状态的室保护系统以及响应于状态来控制处理系统的控制器。

公开(公告)号：US07964515B2

公开(公告)日：2011-06-21

申请号：US11963150

申请日：2007-12-21

申请人： Robert D. Clark ,  Cory Wajda

发明人： Robert D. Clark ,  Cory Wajda

IPC分类号： H01L21/31 ,  H01L21/469 ,  C23C14/00 ,  C23C16/00

CPC分类号： H01L21/3141 ,  C23C16/30 ,  C23C16/40 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517

摘要： A method is provided for forming high dielectric constant (high-k) films for semiconductor devices. According to one embodiment, a metal-carbon-oxygen high-k film is deposited by alternately and sequentially exposing a substrate to a metal-carbon precursor and near saturation exposure level of an oxidation source containing ozone. The method is capable of forming a metal-carbon-oxygen high-k film with good thickness uniformity while impeding growth of an interface layer between the metal-carbon-oxygen high-k film and the substrate. According to one embodiment, the metal-carbon-oxygen high-k film may be treated with an oxidation process to remove carbon from the film.

摘要翻译： 提供一种用于形成用于半导体器件的高介电常数（高k）膜的方法。 根据一个实施方案，通过交替地和顺序地将基底暴露于金属 - 碳前体和含有臭氧的氧化源的近饱和暴露水平来沉积金属 - 碳 - 氧高k膜。 该方法能够形成具有良好厚度均匀性的金属 - 碳 - 氧高k膜，同时阻碍金属 - 碳 - 氧高k膜和衬底之间的界面层的生长。 根据一个实施例，金属 - 碳 - 氧高k膜可以用氧化工艺处理以从膜去除碳。

公开(公告)号：US07300891B2

公开(公告)日：2007-11-27

申请号：US11091755

申请日：2005-03-29

申请人： Igeta Masonobu ,  Cory Wajda ,  Gert Leusink

发明人： Igeta Masonobu ,  Cory Wajda ,  Gert Leusink

IPC分类号： H01L21/00

CPC分类号： H01L21/76801 ,  C23C16/345 ,  C23C16/56 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829

摘要： A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to electro-magnetic (EM) radiation, such as EM radiation having a wavelength component less than about 500 nm. The EM source can include a multi-frequency source of radiation. Additionally, the source of radiation is collimated in order to selectively treat regions of a non-planar film.

摘要翻译： 描述了一种用于增加在诸如氮化硅膜之类的衬底上形成的薄膜中的拉伸应力的方法和系统。 薄膜可以是平面薄膜，或非平面薄膜，例如在NMOS栅极上形成的氮化物薄膜。 该薄膜暴露于电磁（EM）辐射，例如波长分量小于约500nm的EM辐射。 EM源可以包括多频辐射源。 另外，为了选择性地处理非平面膜的区域，准直辐射源。

公开(公告)号：US20060068603A1

公开(公告)日：2006-03-30

申请号：US10711721

申请日：2004-09-30

申请人： Cory Wajda

发明人： Cory Wajda

IPC分类号： H01L21/31

CPC分类号： H01L21/02181 ,  C23C16/40 ,  C23C16/401 ,  C23C16/405 ,  C23C16/5096 ,  C23C16/52 ,  H01L21/02142 ,  H01L21/02175 ,  H01L21/02271 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31645 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/517

摘要： A method for forming a thin complete high-k layer for semiconductor applications. The method includes providing a substrate in a process chamber, depositing a thick complete high-k layer on the substrate, and thinning the deposited high-k layer to form a thin complete high-k layer on the substrate. Alternately, the substrate can contain an interface layer between the substrate and the high-k layer. The thinning can be performed by exposing the thick high-k layer to a reactive plasma etch process or, alternately, a plasma process capable of modifying a portion of the thick high-k layer and subsequently removing the modified portion of the thick high-k layer using wet processing.

摘要翻译： 一种形成用于半导体应用的薄的完整高k层的方法。 该方法包括在处理室中提供衬底，在衬底上沉积厚的完整的高k层，以及稀薄沉积的高k层以在衬底上形成薄的完整的高k层。 或者，衬底可以在衬底和高k层之间包含界面层。 可以通过将厚的高k层暴露于反应性等离子体蚀刻工艺或者替代地，能够修饰厚的高k层的一部分并随后去除厚的高k的修饰部分的等离子体工艺来进行减薄 层采用湿法加工。