公开(公告)号：US20190109246A1

公开(公告)日：2019-04-11

申请号：US16196915

申请日：2018-11-20

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Asako Hirai ,  Tobias Meyer ,  Philipp Drechsel ,  Peter Stauß ,  Anna Nirschl ,  Alvaro Gomez-Iglesias ,  Tobias Niebling ,  Bastian Galler

IPC: H01L31/0352 ,  H01L33/06 ,  H01L29/15

CPC classification number: H01L31/0352 ,  H01L29/151 ,  H01L29/152 ,  H01L31/035236 ,  H01L33/06

Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment a chip includes an active zone with a multi-quantum-well structure, wherein the multi-quantum-well structure includes multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction and which each extend continuously over the entire multi-quantum-well structure, wherein seen in a cross-section parallel to the growth direction, the multi-quantum-well structure has at least one emission region and multiple transport regions, wherein the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission region, wherein, along the growth direction, the transport regions have a constant width, and wherein the quantum-well layers and the barrier layers are oriented parallel to one another in the emission region and in the transport regions.

公开(公告)号：US10121775B2

公开(公告)日：2018-11-06

申请号：US15038034

申请日：2014-11-07

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Christian Leirer ,  Berthold Hahn ,  Karl Engl ,  Johannes Baur ,  Siegfried Herrmann ,  Andreas Ploessl ,  Simeon Katz ,  Tobias Meyer ,  Lorenzo Zini ,  Markus Maute

IPC: H01L33/00 ,  H01L27/02 ,  H01L25/16 ,  H01L27/15 ,  H01L33/62 ,  H01L25/075 ,  H01L33/38

Abstract: Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection.

公开(公告)号：US09761576B2

公开(公告)日：2017-09-12

申请号：US14686364

申请日：2015-04-14

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Rainer Butendeich ,  Alexander Walter ,  Matthias Peter ,  Tobias Meyer ,  Tetsuya Taki ,  Hubert Maiwald

IPC: H01L27/02 ,  H01L33/02 ,  H01L31/0236 ,  H01L31/0304 ,  H01L31/0352 ,  H01L33/06 ,  H01L33/08 ,  H01L33/32 ,  H01L27/15 ,  H01L33/24

CPC classification number: H01L27/0248 ,  H01L27/15 ,  H01L31/02363 ,  H01L31/03044 ,  H01L31/035236 ,  H01L33/02 ,  H01L33/06 ,  H01L33/08 ,  H01L33/24 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

公开(公告)号：US09466759B2

公开(公告)日：2016-10-11

申请号：US14430538

申请日：2013-09-18

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Joachim Hertkorn ,  Jan-Philipp Ahl ,  Lorenzo Zini ,  Matthias Peter ,  Tobias Meyer ,  Alexander Frey

IPC: H01L33/32 ,  H01L33/00 ,  H01L21/02 ,  H01L33/02 ,  H01L33/14 ,  H01L33/22

CPC classification number: H01L33/0075 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/025 ,  H01L33/14 ,  H01L33/22 ,  H01L33/32

Abstract: A method is provided for producing an optoelectronic device, comprising the steps of providing a substrate, applying a nucleation layer on a surface of the substrate, applying and patterning a mask layer on the nucleation layer, growing a nitride semiconductor in a first growth step, wherein webs are laid which form a lateral lattice, wherein the webs have trapezoidal cross-sectional areas in places in the direction of growth, and laterally overgrowing the webs with a nitride semiconductor in a second growth step, to close spaces between the webs.

Abstract translation: 提供了一种用于制造光电子器件的方法，包括以下步骤：提供衬底，在所述衬底的表面上施加成核层，在所述成核层上施加和图案化掩模层，在第一生长步骤中生长氮化物半导体， 其中布置形成横向晶格的网，其中所述网在生长方向上的位置具有梯形横截面面积，并且在第二生长步骤中用氮化物半导体横向过度生长所述网以封闭所述网之间的空间。

公开(公告)号：US20160079470A1

公开(公告)日：2016-03-17

申请号：US14785461

申请日：2014-04-23

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Andreas Löffler ,  Tobias Meyer ,  Adam Bauer ,  Christian Leirer

IPC: H01L33/06 ,  H01L33/00 ,  H01L33/32

CPC classification number: H01L33/06 ,  H01L21/02499 ,  H01L21/02505 ,  H01L21/02507 ,  H01L33/0075 ,  H01L33/04 ,  H01L33/14 ,  H01L33/325

Abstract: An optoelectronic component includes a semiconductor layer structure having a quantum film structure, and a p-doped layer arranged above the quantum film structure, wherein the p-doped layer includes at least one first partial layer and a second partial layer, and the second partial layer has a higher degree of doping than the first partial layer.

Abstract translation: 光电子部件包括具有量子膜结构的半导体层结构和布置在量子膜结构之上的p掺杂层，其中p掺杂层包括至少一个第一部分层和第二部分层，并且第二部分 层具有比第一部分层更高的掺杂程度。

公开(公告)号：US20160056326A1

公开(公告)日：2016-02-25

申请号：US14780982

申请日：2014-03-28

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Andreas Löffler ,  Tobias Meyer ,  Adam Bauer ,  Christian Leirer

IPC: H01L33/00 ,  H01L33/24 ,  H01L33/30 ,  H01L33/06

CPC classification number: H01L33/0062 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02658 ,  H01L25/167 ,  H01L33/007 ,  H01L33/025 ,  H01L33/06 ,  H01L33/24 ,  H01L33/30 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for producing an optoelectronic semiconductor chip is disclosed. A substrate is provided and a first layer is grown. An etching process is carrying out to initiate V-defects. A second layer is grown and a quantum film structure is grown. An optoelectronic semiconductor chip is also disclosed. The method can be used to produce the optoelectronic semiconductor chip.

Abstract translation: 公开了一种制造光电半导体芯片的方法。 提供衬底并且生长第一层。 蚀刻过程正在进行以引发V缺陷。 生长第二层并生长量子膜结构。 还公开了一种光电半导体芯片。 该方法可用于生产光电半导体芯片。

公开(公告)号：US20150249181A1

公开(公告)日：2015-09-03

申请号：US14430198

申请日：2013-09-24

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Christian Leirer ,  Tobias Meyer ,  Matthias Peter ,  Juergen Off ,  Joachim Hertkorn ,  Andreas Loeffler ,  Alexander Walter ,  Dario Schiavon

IPC: H01L33/06 ,  H01L33/24 ,  H01L33/32 ,  H01L33/00

CPC classification number: H01L33/06 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/025 ,  H01L33/14 ,  H01L33/24 ,  H01L33/32 ,  H01L33/58

Abstract: The invention concerns an optoelectronic component comprising a layer structure with a light-active layer. In a first lateral region the light-active layer has a higher density of V-defects than in a second lateral region.

Abstract translation: 本发明涉及包含具有光活性层的层结构的光电子部件。 在第一横向区域中，光活性层具有比在第二横向区域中更高的V缺陷密度。

公开(公告)号：US20200044117A1

公开(公告)日：2020-02-06

申请号：US16495144

申请日：2018-04-16

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Clemens Vierheilig ,  Philipp Kreuter ,  Rainer Hartmann ,  Michael Binder ,  Tobias Meyer

IPC: H01L33/42 ,  H01L33/30 ,  H01L33/00

Abstract: An optoelectronic semiconductor device includes a semiconductor layer sequence including an active zone that generates radiation by electroluminescence; a p-electrode and an n-electrode; an electrically insulating passivation layer on side surfaces of the semiconductor layer sequence; and an edge field generating device on the side surfaces on a side of the passivation layer facing away from the semiconductor layer sequence at the active zone, wherein the edge field generating device is configured to generate an electric field at least temporarily in an edge region of the active zone so that, during operation, a current flow through the semiconductor layer sequence is controllable in the edge region.

公开(公告)号：US10522699B2

公开(公告)日：2019-12-31

申请号：US16196915

申请日：2018-11-20

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Asako Hirai ,  Tobias Meyer ,  Philipp Drechsel ,  Peter Strauß ,  Anna Nirschl ,  Alvaro Gomez-Iglesias ,  Tobias Niebling ,  Bastian Galler

IPC: H01L31/0352 ,  H01L29/15 ,  H01L33/06

Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment a chip includes an active zone with a multi-quantum-well structure, wherein the multi-quantum-well structure includes multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction and which each extend continuously over the entire multi-quantum-well structure, wherein seen in a cross-section parallel to the growth direction, the multi-quantum-well structure has at least one emission region and multiple transport regions, wherein the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission region, wherein, along the growth direction, the transport regions have a constant width, and wherein the quantum-well layers and the barrier layers are oriented parallel to one another in the emission region and in the transport regions.

公开(公告)号：US10418355B2

公开(公告)日：2019-09-17

申请号：US15671772

申请日：2017-08-08

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Rainer Butendeich ,  Alexander Walter ,  Matthias Peter ,  Tobias Meyer ,  Tetsuya Taki ,  Hubert Maiwald

IPC: H01L27/02 ,  H01L33/02 ,  H01L31/0236 ,  H01L31/0304 ,  H01L31/0352 ,  H01L33/06 ,  H01L33/08 ,  H01L33/32 ,  H01L27/15 ,  H01L33/24

Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a first semiconductor layer sequence having a plurality of microdiodes, and a second semiconductor layer sequence having an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.