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    STACKABLE MOLECULAR SPECTROSCOPY CELL
    22.
    发明申请
    STACKABLE MOLECULAR SPECTROSCOPY CELL 有权

    公开(公告)号：US20230095040A1

    公开(公告)日：2023-03-30

    申请号：US17490938

    申请日：2021-09-30

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Argyrios Dellis ,  Adam Fruehling ,  Simon Joshua Jacobs

    IPC: G01J3/02 ,  G01J3/433

    Abstract: A stackable molecular spectroscopy cell includes a hollow body, a first cap affixed to a first surface of the hollow body, covering a first opening in the hollow body, and a second cap affixed to a second surface of the hollow body, covering a second opening in the hollow body, and forming a sealed cavity within the hollow body. The sealed cavity contains a dipolar gas having a pressure of less than 0.5 mbar. The stackable molecular spectroscopy cell also includes a metal layer covering an inner surface of the hollow body and an inner surface of the first and second caps, including a first aperture in the metal layer covering the inner surface of the first cap and a second aperture in the metal layer covering the inner surface of the second cap.

    WINDOWED WAFER ASSEMBLIES HAVING INTERPOSERS
    25.
    发明申请
    WINDOWED WAFER ASSEMBLIES HAVING INTERPOSERS 有权

    公开(公告)号：US20210098635A1

    公开(公告)日：2021-04-01

    申请号：US16588592

    申请日：2019-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Simon Joshua Jacobs

    IPC: H01L31/02 ,  H01L31/0232 ,  H01L31/0203 ,  H01L31/18

    Abstract: Windowed wafer assemblies having interposers are described. A described example integrated circuit (IC) package includes first and second dies, where at least one of the first or second dies includes an optical window with a light transmittance wavelength range between 0.1 micrometers and 1.0 millimeter, and an interposer die between the first and second dies, where the interposer die is coupled to the first die at a first surface of the interposer to form a first bonded interface, where the interposer is coupled to the second die at a second surface of the interposer die to form a second bonded interface, where the second surface is opposite the first surface, where the first and second bonded interfaces form a sealed cavity of the IC package that is at least partially formed by the optical window, and where the interposer die includes electrical routing.

    Optical electronics device
    27.
    发明授权
    Optical electronics device 有权

    公开(公告)号：US10894712B2

    公开(公告)日：2021-01-19

    申请号：US15975349

    申请日：2018-05-09

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Simon Joshua Jacobs

    IPC: B81C1/00 ,  B81B3/00 ,  G02B26/08 ,  H01L33/48 ,  B81B7/00 ,  G02B1/115

    Abstract: An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.

    Dielectric cladding of microelectromechanical systems (MEMS) elements for improved reliability
    30.
    发明授权
    Dielectric cladding of microelectromechanical systems (MEMS) elements for improved reliability 有权

    公开(公告)号：US10029908B1

    公开(公告)日：2018-07-24

    申请号：US15395029

    申请日：2016-12-30

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Simon Joshua Jacobs ,  Molly Nelis Sing ,  Kelly Jay Taylor

    IPC: H01L29/84 ,  B81B3/00 ,  B81C1/00

    Abstract: In described examples, a method of forming a microelectromechanical device comprises: forming a first metallic layer comprising a conducting layer on a substrate; forming a first dielectric layer on the first metallic layer, wherein the first dielectric layer comprises one or more individual dielectric layers; forming a sacrificial layer on the first dielectric layer; forming a second dielectric layer on the sacrificial layer; forming a second metallic layer on the second dielectric layer; and removing the sacrificial layer to form a spacing between the second dielectric layer and the first dielectric layer. Removing the sacrificial layer enables movement of the second dielectric layer relative to the first dielectric layer in at least one direction.

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