公开(公告)号：US09466480B2

公开(公告)日：2016-10-11

申请号：US14532015

申请日：2014-11-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Chueh-Yang Liu ,  Neng-Hui Yang

IPC: H01L21/8242 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/02334 ,  H01L21/0206 ,  H01L21/02181 ,  H01L21/02307 ,  H01L21/28211 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A cleaning process for oxide includes the following step. A substrate having a first area and a second area is provided. A first oxide layer is formed on the substrate of the first area and the second area. An ammonium hydroxide (NH4OH) and hydrogen peroxide (H2O2) containing process is performed on the first oxide layer of the first area and the second area. A photoresist layer covers the first oxide layer of the first area while exposing the first oxide layer of the second area. The first oxide layer of the second area is removed. The photoresist layer is then removed.

Abstract translation: 氧化物的清洗方法包括以下步骤。 提供具有第一区域和第二区域的衬底。 在第一区域和第二区域的基板上形成第一氧化物层。 在第一区域和第二区域的第一氧化物层上进行含有氢氧化铵（NH 4 OH）和过氧化氢（H 2 O 2）的工艺。 光致抗蚀剂层覆盖第一区域的第一氧化物层，同时暴露第二区域的第一氧化物层。 去除第二区域的第一氧化物层。 然后除去光致抗蚀剂层。

公开(公告)号：US09401429B2

公开(公告)日：2016-07-26

申请号：US13917623

申请日：2013-06-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-Cheng Chien ,  Chun-Yuan Wu ,  Chin-Fu Lin ,  Chih-Chien Liu ,  Chia-Lin Hsu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/78696

Abstract: A semiconductor structure includes a fin-shaped structure and a gate. The fin-shaped structure is located in a substrate, wherein the fin-shaped structure has a through hole located right below a suspended part. The gate surrounds the suspended part. Moreover, the present invention also provides a semiconductor process including the following steps for forming said semiconductor structure. A substrate is provided. A fin-shaped structure is formed in the substrate, wherein the fin-shaped structure has a bottom part and a top part. A part of the bottom part is removed to form a suspended part in the corresponding top part, thereby forming the suspended part over a through hole. A gate is formed to surround the suspended part.

Abstract translation: 半导体结构包括鳍状结构和栅极。 鳍状结构位于基板中，其中鳍状结构具有位于悬挂部分正下方的通孔。 门围绕悬挂部分。 此外，本发明还提供一种半导体工艺，包括用于形成所述半导体结构的以下步骤。 提供基板。 在基板上形成翅片状结构，其中，翅片状结构具有底部和顶部。 底部的一部分被去除以在相应的顶部部分中形成悬挂部分，从而在悬空部分上形成通孔。 形成围绕悬挂部分的门。

公开(公告)号：US20160211144A1

公开(公告)日：2016-07-21

申请号：US14631807

申请日：2015-02-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ying Lin ,  Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Chih-Chien Liu ,  Hsin-Kuo Hsu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L21/306 ,  H01L29/66 ,  H01L29/08 ,  H01L21/3065

CPC classification number: H01L21/30608 ,  H01L21/3065 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/785

Abstract: An epitaxial process applying light illumination includes the following steps. A substrate is provided. A dry etching process and a wet etching process are performed to form a recess in the substrate, wherein an infrared light illuminates while the wet etching process is performed. An epitaxial structure is formed in the recess.

Abstract translation: 施加光照射的外延工艺包括以下步骤。 提供基板。 执行干蚀刻工艺和湿蚀刻工艺以在衬底中形成凹部，其中在执行湿蚀刻工艺时红外光照亮。 在凹部中形成外延结构。

公开(公告)号：US20160111527A1

公开(公告)日：2016-04-21

申请号：US14979594

申请日：2015-12-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-Cheng Chien ,  Hsin-Kuo Hsu ,  Chih-Chien Liu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L29/66 ,  H01L21/311 ,  H01L29/10 ,  H01L21/02

CPC classification number: H01L29/66795 ,  H01L21/0228 ,  H01L21/02532 ,  H01L21/30604 ,  H01L21/31111 ,  H01L29/06 ,  H01L29/0657 ,  H01L29/1054 ,  H01L29/36 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7853

Abstract: A method for fabricating semiconductor device with fin-shaped structure is disclosed. The method includes the steps of: forming a fin-shaped structure on a substrate; forming a first dielectric layer on the substrate and the fin-shaped structure; depositing a second dielectric layer on the first dielectric layer; etching back a portion of the second dielectric layer; removing part of the first dielectric layer to expose a top surface and part of the sidewall of the fin-shaped structure; forming an epitaxial layer to cover the exposed top surface and part of the sidewall of the fin-shaped structure; and removing a portion of the second dielectric layer.

Abstract translation: 公开了一种制造具有鳍状结构的半导体器件的方法。 该方法包括以下步骤：在衬底上形成鳍状结构; 在所述基板上形成第一电介质层和所述鳍状结构; 在所述第一电介质层上沉积第二电介质层; 蚀刻第二介电层的一部分; 去除所述第一电介质层的一部分以暴露所述鳍状结构的顶表面和所述侧壁的一部分; 形成外延层以覆盖所述鳍状结构的暴露的顶表面和所述侧壁的一部分; 以及去除所述第二电介质层的一部分。

公开(公告)号：US09312258B2

公开(公告)日：2016-04-12

申请号：US13936214

申请日：2013-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Guang-Yaw Hwang ,  Ling-Chun Chou ,  I-Chang Wang ,  Shin-Chuan Huang ,  Jiunn-Hsiung Liao ,  Shin-Chi Chen ,  Pau-Chung Lin ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chieh-Te Chen

IPC: H01L27/088 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.

公开(公告)号：US09263579B2

公开(公告)日：2016-02-16

申请号：US14723447

申请日：2015-05-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming-Hua Chang ,  Chun-Yuan Wu ,  Chin-Cheng Chien ,  Tien-Wei Yu ,  Yu-Shu Lin ,  Szu-Hao Lai

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/30 ,  H01L29/66 ,  H01L29/165 ,  H01L21/306 ,  H01L21/324 ,  H01L29/08 ,  H01L29/161

CPC classification number: H01L29/7848 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3003 ,  H01L21/30604 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66636

Abstract: A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface.

公开(公告)号：US20160027699A1

公开(公告)日：2016-01-28

申请号：US14461444

申请日：2014-08-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-Cheng Chien

IPC: H01L21/8234 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: The present invention provides a method for forming a semiconductor structure, including the following steps: Firstly, a substrate is provided, the substrate has a first region defined thereon, a plurality of fin structure is disposed within the first region, and an insulating layer is disposed on the substrate and between each fin structure; next, a first material layer is then formed on the insulating layer, and the fin structures is exposed simultaneously, afterwards, the fin structure is partially removed, and an epitaxial layer is then formed on the top surface of each remained fin structure.

Abstract translation: 本发明提供一种形成半导体结构的方法，包括以下步骤：首先，设置基板，其上限定有第一区域，在第一区域内设置多个翅片结构，绝缘层为 设置在基板上并在每个翅片结构之间; 接着，在绝缘层上形成第一材料层，同时对鳍片结构进行曝光，然后将翅片结构部分地去除，然后在每个残留的翅片结构的顶表面上形成外延层。

公开(公告)号：US20150357190A1

公开(公告)日：2015-12-10

申请号：US14312707

申请日：2014-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-Cheng Chien ,  Hsin-Kuo Hsu ,  Chih-Chien Liu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L21/02 ,  H01L29/36 ,  H01L29/78 ,  H01L21/311

CPC classification number: H01L29/66795 ,  H01L21/0228 ,  H01L21/02532 ,  H01L21/30604 ,  H01L21/31111 ,  H01L29/06 ,  H01L29/0657 ,  H01L29/1054 ,  H01L29/36 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7853

Abstract: A semiconductor device with fin-shaped structure is disclosed. The semiconductor device includes: a substrate; a fin-shaped structure on the substrate; and an epitaxial layer on a top surface and part of the sidewall of the fin-shaped structure, in which the epitaxial layer and the fin-shaped structure includes a linear gradient of germanium concentration therebetween.

Abstract translation: 公开了一种具有鳍状结构的半导体器件。 半导体器件包括：衬底; 基板上的鳍状结构; 以及在鳍状结构的顶表面和侧壁的一部分上的外延层，其中外延层和鳍状结构在其间包括锗浓度的线性梯度。

公开(公告)号：US09184292B2

公开(公告)日：2015-11-10

申请号：US14340267

申请日：2014-07-24

Applicant: United Microelectronics Corp.

Inventor： Chin-Fu Lin ,  Chin-Cheng Chien ,  Chun-Yuan Wu ,  Teng-Chun Tsai ,  Chih-Chien Liu

IPC: H01L29/04 ,  H01L29/76 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/108 ,  H01L29/66 ,  H01L21/764 ,  H01L29/165 ,  H01L21/311 ,  H01L29/10 ,  H01L29/16 ,  H01L29/161 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/314 ,  H01L21/318 ,  H01L27/088

CPC classification number: H01L29/785 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/3141 ,  H01L21/3185 ,  H01L21/764 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L27/10879 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795

Abstract: A semiconductor structure for forming FinFETs is described. The semiconductor structure includes a semiconductor substrate, a plurality of odd fins of the FinFETs on the substrate, and a plurality of even fins of the FinFETs on the substrate between the odd fins of the FinFETs. The odd fins of the FinFETs are defined from the substrate. The even fins of the FinFETs are different from the odd fins of the FinFETs in at least one of the width and the material, and may be further different from the odd fins of the FinFETs in the height.

Abstract translation: 描述用于形成FinFET的半导体结构。 半导体结构包括半导体衬底，衬底上的FinFET的多个奇数鳍片，以及FinFET的奇数鳍片之间的衬底上的FinFET的多个偶数鳍片。 FinFET的奇数鳍从衬底定义。 FinFET的均匀鳍片与宽度和材料中的至少一个中的FinFET的奇数鳍不同，并且可以与FinFET的高度的奇数鳍不同。

公开(公告)号：US20150170916A1

公开(公告)日：2015-06-18

申请号：US14108369

申请日：2013-12-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Wei Yu ,  Chun-Jen Chen ,  Tsung-Mu Yang ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Chin-Cheng Chien

IPC: H01L21/02

CPC classification number: H01L21/02664 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor process includes the steps of providing a substrate with fin structures formed thereon, performing an epitaxy process to grow an epitaxial structure on each fin structure, forming a conformal cap layer on each epitaxial structure, where adjacent conformal cap layers contact each other, and performing an etching process to separate contacting conformal cap layers.

Abstract translation: 一种半导体工艺包括以下步骤：提供具有在其上形成的鳍结构的衬底，执行外延工艺以在每个鳍结构上生长外延结构，在每个外延结构上形成共形盖层，其中相邻的保形盖层彼此接触，以及 执行蚀刻工艺以分离接触的保形盖层。