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    Nitride Semiconductor Device
    21.
    发明申请
    Nitride Semiconductor Device 有权
    氮化物半导体器件

    公开(公告)号：US20090057695A1

    公开(公告)日：2009-03-05

    申请号：US12223784

    申请日：2007-02-08

    申请人： Ken Nakahara

    发明人： Ken Nakahara

    IPC分类号： H01L33/00

    CPC分类号： H01L33/04 ,  H01L33/0079 ,  H01L33/32

    摘要： A nitride semiconductor device according to the present invention sequentially includes at least an n-electrode, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The n-type semiconductor layer includes: an n-type GaN contact layer including n-type impurity-doped GaN having an electron concentration ranging from 5×1016 cm−3 to 5×1018 cm−3; the n-electrode provided on one of a main surface of the n-type GaN contact layer; and a generating layer provided on other main surface of the n-type GaN contact layer, including at least any one of AlxGa1-xN (0

    摘要翻译： 根据本发明的氮化物半导体器件至少依次包括n电极，n型半导体层，有源层和p型半导体层。 n型半导体层包括：n型GaN接触层，其包含具有5×10 16 cm -3至5×10 18 cm -3的电子浓度的n型杂质掺杂的GaN; n电极，设置在n型GaN接触层的主表面之一上; 和包含Al x Ga 1-x N（0

    Nitride Semiconductor Device and Method for Growing Nitride Semiconductor Crystal Layer
    22.
    发明申请
    Nitride Semiconductor Device and Method for Growing Nitride Semiconductor Crystal Layer 审中-公开
    氮化物半导体器件和氮化物半导体晶体层生长方法

    公开(公告)号：US20080308836A1

    公开(公告)日：2008-12-18

    申请号：US11883062

    申请日：2006-01-26

    申请人： Ken Nakahara ,  Kentaro Tamura

    发明人： Ken Nakahara ,  Kentaro Tamura

    IPC分类号： H01L33/00 ,  H01L21/00

    CPC分类号： H01L21/02658 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66454 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/007 ,  H01L33/12

    摘要： There are provided a nitride semiconductor device such as a nitride semiconductor light emitting device, a transistor device or the like, obtained by forming a buffer layer of a single crystal of the nitride semiconductor, in which both a-axis and c-axis are aligned, directly on a substrate lattice-mismatched with the nitride semiconductor without forming an amorphous low temperature buffer layer, and growing epitaxially the nitride semiconductor layer on the buffer layer of the single crystal. In this device, a single crystal buffer layer (2), made of a single crystal of AlxGayIn1-x-yN (0≦x≦1, 0≦y≦1 and 0≦x+y≦1), in which a-axis and c-axis are aligned, is directly formed on a substrate (1) lattice-mismatched with nitride semiconductor, and a nitride semiconductor layer (3) is epitaxially grown on the buffer layer (2) of the single crystal. The buffer layer of the single crystal can be formed by the use of a PLD method.

    摘要翻译： 提供了一种氮化物半导体器件，例如氮化物半导体发光器件，晶体管器件等，其通过形成氮化物半导体的单晶的缓冲层而获得，其中a轴和c轴都被对准 直接在与氮化物半导体晶格失配的衬底上，而不形成非晶低温缓冲层，并且在单晶缓冲层上外延生长氮化物半导体层。 在该器件中，由AlxGayIn1-x-yN（0≤x≤1,0<= y <= 1和0 <= x + y <= 1）的单晶制成的单晶缓冲层（2） ），其中a轴和c轴对准，直接形成在与氮化物半导体晶格失配的衬底（1）上，并且氮化物半导体层（3）外延生长在 单晶。 单晶的缓冲层可以通过使用PLD法形成。

    MULTILAYER SUBSTRATE
    23.
    发明申请
    MULTILAYER SUBSTRATE 审中-公开
    多层基板

    公开(公告)号：US20080187776A1

    公开(公告)日：2008-08-07

    申请号：US12026863

    申请日：2008-02-06

    申请人： Ken Nakahara ,  Hiroyuki Yuji ,  Kentaro Tamura ,  Shunsuke Akasaka ,  Yoshio Nishimoto ,  Masashi Kawasaki ,  Akira Ohtomo ,  Atsushi Tsukazaki

    发明人： Ken Nakahara ,  Hiroyuki Yuji ,  Kentaro Tamura ,  Shunsuke Akasaka ,  Yoshio Nishimoto ,  Masashi Kawasaki ,  Akira Ohtomo ,  Atsushi Tsukazaki

    IPC分类号： B32B15/00

    CPC分类号： C23C28/322 ,  C23C28/34 ,  C23C28/345 ,  C23C28/3455 ,  Y10T428/12778

    摘要： Provided is a multilayer substrate having the configuration in which a multilayer film is formed on a principal surface opposite to a principal surface in the oxide-thin-film lamination direction in a translucent substrate. The multilayer film is formed by sequentially laminating a dielectric film, Au (gold) film, and oxide film in this order from the translucent substrate. On the principal surface opposite to the principal surface on which the oxide thin film is disposed, the multilayer film containing the Au film is formed, the Au film can reflect and block the excessive infrared light from a substrate holder or a heat source at the time of growth. As a result, temperature can be accurately measured.

    摘要翻译： 提供一种多层基板，其具有在透光性基板中在与氧化物薄膜层叠方向的主面相反的主面上形成多层膜的结构。 通过从透光性基板依次层叠电介质膜Au（金）膜和氧化膜而形成多层膜。 在与设置有氧化物薄膜的主表面相对的主表面上形成含有Au膜的多层膜，Au膜可以反映并阻挡来自衬底保持器或热源的过多红外光 的增长。 结果，可以精确地测量温度。

    GaN system semiconductor light emitting device excellent in light emission efficiency and light extracting efficiency
    24.
    发明授权
    GaN system semiconductor light emitting device excellent in light emission efficiency and light extracting efficiency 有权
    GaN系半导体发光器件的发光效率和光提取效率优异

    公开(公告)号：US07196348B2

    公开(公告)日：2007-03-27

    申请号：US10763137

    申请日：2004-01-21

    申请人： Ken Nakahara

    发明人： Ken Nakahara

    IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

    CPC分类号： H01L33/42 ,  H01L33/32

    摘要： Although there is provided a high light transmittance of an emitted light by a ITO electrode film conventionally employed, there occurs a formation of a Schottky type contact between the ITO electrode film and a p type GaN system semiconductor layer, thus resulting in a not uniform flow of an electric current. It is an object of the present invention to provide a semiconductor light emitting device constituted by forming a transparent electrode, which facilitates acquiring an ohmic property, to be replaced by an ITO electrode film, at the light extracting or light exit side of the GaN system semiconductor light emitting device, so as to improve a light emission efficiency and a radiation extracting efficiency or a light exit efficiency of a GaN system semiconductor light emitting device. In order to accomplish the above mentioned object, the present invention provides a semiconductor light emitting device comprising a light emission layer, consisting of a GaN system semiconductor, which is interposed between an n type GaN system semiconductor layer and a p type GaN system semiconductor layer, wherein there is provided a Ga-doped MgzZn1-zO (0≦

    摘要翻译： 虽然通过常规使用的ITO电极膜提供了发射光的高透光率，但是在ITO电极膜和ap型GaN系半导体层之间形成肖特基型接触，从而导致不均匀的流动 电流。 本发明的目的是提供一种半导体发光器件，其通过在GaN系统的光提取或光出射侧形成有助于获得由ITO电极膜代替的欧姆性的透明电极 以提高GaN系半导体发光元件的发光效率和放射线提取效率或光出射效率。 为了实现上述目的，本发明提供了一种半导体发光器件，其包括由n型GaN系半导体层和p型GaN系半导体层之间插入的由GaN系半导体构成的发光层， 其中提供Ga掺杂的Mg z Zn 1-z O（0 <= 1）电极膜。

    Zinc oxide based compound semiconductor device
    26.
    发明授权
    Zinc oxide based compound semiconductor device 有权
    氧化锌基化合物半导体器件

    公开(公告)号：US07960727B2

    公开(公告)日：2011-06-14

    申请号：US11992407

    申请日：2006-09-21

    申请人： Ken Nakahara ,  Yuji Hiroyuki

    发明人： Ken Nakahara ,  Yuji Hiroyuki

    IPC分类号： H01L29/10 ,  C30B25/18

    CPC分类号： H01L33/28 ,  H01L29/225 ,  H01L29/7787 ,  H01L33/16 ,  H01S5/0207 ,  H01S5/0422 ,  H01S5/2201 ,  H01S5/2231 ,  H01S5/327

    摘要： There is provided a zinc oxide based compound semiconductor device which, even when a semiconductor device is formed by forming a lamination portion having a hetero junction of ZnO based compound semiconductor layers, does not cause any rise in a drive voltage while ensuring p-type doping, and, at the same time, can realize good crystallinity and excellent device characteristics. ZnO based compound semiconductor layers (2) to (6) are epitaxially grown on the principal plane of a substrate (1) made of MgxZn1-xO (0≦x

    摘要翻译： 提供了一种氧化锌基化合物半导体器件，即使当通过形成具有ZnO基化合物半导体层的异质结的层叠部分形成半导体器件时，也不会导致驱动电压的任何上升，同时确保p型掺杂 ，同时可以实现良好的结晶度和优异的器件特性。 ZnO基化合物半导体层（2）〜（6）在由Mg x Zn 1-x O（0＆nlE; x <1）构成的基板（1）的主面上外延生长。 基板的主平面是A平面{11-20}或M平面{10-10}在-c轴方向上倾斜的平面。

    ZNO-GROUP SEMICONDUCTOR ELEMENT
    28.
    发明申请
    ZNO-GROUP SEMICONDUCTOR ELEMENT 审中-公开
    ZNO-GROUP半导体元件

    公开(公告)号：US20110037067A1

    公开(公告)日：2011-02-17

    申请号：US12734772

    申请日：2008-11-20

    申请人： Ken Nakahara ,  Masashi Kawasaki ,  Akira Ohtomo ,  Atsushi Tsukazaki

    发明人： Ken Nakahara ,  Masashi Kawasaki ,  Akira Ohtomo ,  Atsushi Tsukazaki

    IPC分类号： H01L29/22

    CPC分类号： H01L29/045 ,  H01L21/02403 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02554 ,  H01L29/22 ,  H01L29/221 ,  H01L29/868 ,  H01L33/28

    摘要： Provided is a ZnO-based semiconductor device in which flat ZnO-based semiconductor layers can be grown on a MgZnO substrate having a laminate-side principal surface including a C-plane. With an MgxZn1-xO substrate (0≦x

    摘要翻译： 提供一种其中可以在具有包括C面的层压体侧主表面的MgZnO基板上生长平坦的ZnO基半导体层的ZnO基半导体器件。 对于具有包括C面的主表面的Mg x Zn 1- x O衬底（0＆amp; nlE; x <1），主表面形成为使得在衬底的晶轴的c轴和通过突出 在由m轴和衬底的晶轴的c轴限定的平面上的主表面的法线可以在0 <Φm和nlE的范围内; 3。 在如此形成的主表面上，外延生长ZnO基半导体层2至5。 在ZnO基半导体层5上形成p电极8，在Mg x Zn 1-x O基板1的底面形成有n电极9.以这种方式，在Mg x Zn n-x O基板的表面上形成有台阶 同时在m轴方向上规则地布置。 由此，可以避免称为步骤聚束的现象，能够提高在基板1上形成的各半导体层的膜的平坦度。