公开(公告)号：US08546210B2

公开(公告)日：2013-10-01

申请号：US12794120

申请日：2010-06-04

申请人： Yoshiaki Yamamoto ,  Koichiro Tanaka ,  Atsuo Isobe ,  Daisuke Ohgarane ,  Shunpei Yamazaki

发明人： Yoshiaki Yamamoto ,  Koichiro Tanaka ,  Atsuo Isobe ,  Daisuke Ohgarane ,  Shunpei Yamazaki

IPC分类号： H01L21/336

CPC分类号： H01L21/6835 ,  H01L21/02532 ,  H01L21/02683 ,  H01L21/02691 ,  H01L21/84 ,  H01L23/544 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L27/12 ,  H01L29/78603 ,  H01L29/78648 ,  H01L2221/6835 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01Q1/38 ,  H01Q9/285 ,  H01Q23/00 ,  Y10S438/982 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.

摘要翻译： 本发明的目的是提供一种通过与专利文献1中公开的方法不同的方法从衬底分离薄膜晶体管和包括薄膜晶体管的电路或半导体器件的方法，并且将薄膜 晶体管，以及电路或半导体器件到具有柔性的衬底。 根据本发明，在绝缘膜上形成大的开口或多个开口，在开口处形成连接到薄膜晶体管的导电膜，并且去除剥离层，然后，将具有薄的 薄膜晶体管转置到具有导电膜等的基板上。 根据本发明的薄膜晶体管具有通过激光照射而结晶的半导体膜，并且防止剥离层在不被激光照射的激光照射下曝光。

公开(公告)号：US07692194B2

公开(公告)日：2010-04-06

申请号：US12015362

申请日：2008-01-16

申请人： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromichi Godo

发明人： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromichi Godo

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78621 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78618 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a novel structure by which the operating characteristics and reliability are improved and a manufacturing method thereof. An island-shaped semiconductor layer provided over a substrate, including a channel formation region provided between a pair of impurity regions; a first insulating layer provided so as to be in contact with the side surface of the semiconductor layer; a gate electrode provided over the channel formation region so as to get across the semiconductor layer; and a second insulating layer provided between the channel formation region and the gate electrode are included. The semiconductor layer is locally thinned, the channel formation region is provided in the thinned region, and the second insulating layer covers the first insulating layer provided on the side surface of the semiconductor layer at least in the region which overlaps with the gate electrode.

摘要翻译： 具有改善其操作特性和可靠性的新颖结构的半导体器件及其制造方法。 一种岛状半导体层，设置在衬底上，包括设置在一对杂质区之间的沟道形成区; 设置成与半导体层的侧表面接触的第一绝缘层; 栅电极，设置在所述沟道形成区上方以穿过所述半导体层; 并且包括设置在沟道形成区域和栅电极之间的第二绝缘层。 半导体层被局部变薄，沟道形成区域设置在减薄区域中，并且第二绝缘层至少在与栅电极重叠的区域中覆盖设置在半导体层的侧表面上的第一绝缘层。

公开(公告)号：US07312473B2

公开(公告)日：2007-12-25

申请号：US10329993

申请日：2002-12-27

申请人： Jun Koyama ,  Atsuo Isobe ,  Hiroshi Shibata ,  Shunpei Yamazaki

发明人： Jun Koyama ,  Atsuo Isobe ,  Hiroshi Shibata ,  Shunpei Yamazaki

IPC分类号： H01L29/00 ,  H01L29/94 ,  H01L33/00

CPC分类号： H01L29/78696 ,  H01L27/1296 ,  H01L27/3244 ,  H01L29/66757 ,  H01L29/78675

摘要： In display devices using thin film transistors, a graphoepitaxy is used for a semiconductor layer crystallizing process. Thus, a display device in which crystallinity is improved, a variation in characteristics of thin film transistors is reduced, display nonuniformity is less, and a display quality is superior is provided. Steps are formed on a substrate in advance and an amorphous silicon film is formed thereon, and then laser crystallization is conducted in a direction perpendicular to the steps.

摘要翻译： 在使用薄膜晶体管的显示装置中，使用石墨刻蚀技术进行半导体层结晶工艺。 因此，结晶度提高的显示装置，薄膜​​晶体管的特性变化减小，显示不均匀性低，显示质量优异。 预先在基板上形成台阶，在其上形成非晶硅膜，然后在与台阶垂直的方向上进行激光结晶。

公开(公告)号：US20070120127A1

公开(公告)日：2007-05-31

申请号：US11698864

申请日：2007-01-29

申请人： Atsuo Isobe ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Shunpei Yamazaki ,  Mai Akiba

发明人： Atsuo Isobe ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Shunpei Yamazaki ,  Mai Akiba

IPC分类号： H01L29/76 ,  H01L29/04 ,  H01L29/06

CPC分类号： H01L21/02683 ,  H01L21/2022 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78696

摘要： It is a problem to provide a semiconductor device production system using a laser crystallization method capable of preventing grain boundaries from forming in a TFT channel region and further preventing conspicuous lowering in TFT mobility due to grain boundaries, on-current decrease or off-current increase. An insulation film is formed on a substrate, and a semiconductor film is formed on the insulation film. Due to this, preferentially formed is a region in the semiconductor film to be concentratedly applied by stress during crystallization with laser light. Specifically, a stripe-formed or rectangular concavo-convex is formed on the semiconductor film. Continuous-oscillation laser light is irradiated along the striped concavo-convex or along a direction of a longer or shorter axis of rectangle.

摘要翻译： 提供一种使用能够防止在TFT沟道区域中形成晶界的激光晶体化方法的半导体器件制造系统的问题，并且进一步防止由于晶界引起的TFT迁移率的明显降低，导通电流降低或截止电流增加 。 在基板上形成绝缘膜，在绝缘膜上形成半导体膜。 由此，优选形成半导体膜中通过激光在结晶期间通过应力集中施加的区域。 具体地，在半导体膜上形成条状或矩形凹凸。 连续振荡激光沿着条纹凹凸或长轴或短轴方向照射。

公开(公告)号：US20070070346A1

公开(公告)日：2007-03-29

申请号：US11600833

申请日：2006-11-17

申请人： Atsuo Isobe ,  Shunpei Yamazaki ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Mai Akiba

发明人： Atsuo Isobe ,  Shunpei Yamazaki ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Mai Akiba

IPC分类号： G01J3/30

CPC分类号： H01L27/1222 ,  B23K26/0738 ,  H01L21/02354 ,  H01L21/02356 ,  H01L21/02675 ,  H01L21/02683 ,  H01L21/02686 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/32139 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78696 ,  Y10S118/90 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

摘要： A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

摘要翻译： 提供了一种使用激光晶化方法的半导体器件制造系统，其可以避免在TFT的沟道形成区域中形成晶界，从而防止晶界大大降低TFT的迁移率，降低导通电流，并且提高截止电流 。 在绝缘膜上形成矩形或条纹图案凹陷和突出部分。 在绝缘膜上形成半导体膜。 通过沿着条形图案凹陷和绝缘膜的突出部分沿着矩形的长轴或短轴方向运行激光来对连续波激光照射半导体膜。 尽管在激光中最优选连续波激光，但也可以在照射半导体膜时使用脉冲振荡激光。

公开(公告)号：US07166863B2

公开(公告)日：2007-01-23

申请号：US10941823

申请日：2004-09-16

申请人： Shunpei Yamazaki ,  Kiyoshi Kato ,  Atsuo Isobe ,  Hidekazu Miyairi ,  Hideomi Suzawa ,  Yutaka Shionoiri ,  Hiroyuki Miyake

发明人： Shunpei Yamazaki ,  Kiyoshi Kato ,  Atsuo Isobe ,  Hidekazu Miyairi ,  Hideomi Suzawa ,  Yutaka Shionoiri ,  Hiroyuki Miyake

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01L21/02609 ,  H01L21/2026 ,  H01L27/12 ,  H01L27/1281 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675 ,  H01L29/78696

摘要： A semiconductor element which is capable of operating at a high speed, high in an electric current drive capability, and small in fluctuation among a plurality of elements, and a semiconductor device including the semiconductor element are provided. The semiconductor element has a first crystalline semiconductor region including plural crystal orientations without practically having a grain boundary on an insulating surface, the first crystalline semiconductor region being provided to be jointly connected to a conductive region including the first crystalline semiconductor region and a second crystalline semiconductor region, in which the conductive region is provided astride insulating films extending in a linear stripe pattern.

摘要翻译： 提供能够高速运行，电流驱动能力高，多个元件之间波动小的半导体元件，以及包括半导体元件的半导体器件。 半导体元件具有包括多个晶体取向的第一晶体半导体区域，而绝缘表面实际上不具有晶界，第一晶体半导体区域被设置为共同连接到包括第一晶体半导体区域的导电区域和第二晶体半导体区域 区域，其中导电区域被设​​置成跨过线性条纹图案延伸的绝缘膜。

公开(公告)号：US20060270066A1

公开(公告)日：2006-11-30

申请号：US11405514

申请日：2006-04-18

申请人： Ryota Imahayashi ,  Shinobu Furukawa ,  Atsuo Isobe ,  Yasuyuki Arai ,  Shunpei Yamazaki

发明人： Ryota Imahayashi ,  Shinobu Furukawa ,  Atsuo Isobe ,  Yasuyuki Arai ,  Shunpei Yamazaki

IPC分类号： H01L21/00

CPC分类号： H01L51/0512 ,  H01L21/02175 ,  H01L21/02244 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/31683 ,  H01L51/0002 ,  H01L51/0055 ,  H01L51/0525 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/0566

摘要： It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm−3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.

摘要翻译： 本发明的目的是形成致密且具有很强绝缘电阻特性的高质量栅极绝缘膜，并且提出了隧道泄漏电流很小的高可靠性有机晶体管。 本发明的有机晶体管的一种模式具有如下步骤：通过使用密集的方法形成作为活化氧（或含氧气体）或氮（或含氮气体）的栅极的导电层形成栅极绝缘膜 等离子体，其中电子密度为10〜30cm -3以上，等离子体激活时电子温度为0.2eV〜2.0eV，直接与 作为要被绝缘的栅电极的导电层的一部分。

公开(公告)号：US07078768B2

公开(公告)日：2006-07-18

申请号：US10815701

申请日：2004-04-02

申请人： Shunpei Yamazaki ,  Etsuko Fujimoto ,  Atsuo Isobe ,  Toru Takayama ,  Kunihiko Fukuchi

发明人： Shunpei Yamazaki ,  Etsuko Fujimoto ,  Atsuo Isobe ,  Toru Takayama ,  Kunihiko Fukuchi

IPC分类号： H01L27/12

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1277 ,  H01L29/42384

摘要： A semiconductor device and a process for production thereof, said semiconductor device having a new electrode structure which has a low resistivity and withstands heat treatment at 400° C. and above. Heat treatment at a high temperature (400–700° C.) is possible because the wiring is made of Ta film or Ta-based film having high heat resistance. This heat treatment permits the gettering of metal element in crystalline silicon film. Since this heat treatment is lower than the temperature which the gate wiring (0.1–5 μm wide) withstands and the gate wiring is protected with a protective film, the gate wiring retains its low resistance.

公开(公告)号：US20060071210A1

公开(公告)日：2006-04-06

申请号：US11148289

申请日：2005-06-09

申请人： Shunpei Yamazaki ,  Atsuo Isobe ,  Tetsuji Yamaguchi ,  Hiromichi Godo

发明人： Shunpei Yamazaki ,  Atsuo Isobe ,  Tetsuji Yamaguchi ,  Hiromichi Godo

IPC分类号： H01L31/0376

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/13 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78624

摘要： It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.

摘要翻译： 本发明的目的是制造具有所需性能的薄膜晶体管，而不会使步骤和装置复杂化。 本发明的另一个目的是提供一种以更低的成本制造具有高可靠性和更好的电气特性并以较高产量获得的半导体器件的技术。 在本发明中，在薄膜晶体管中由栅极电极层覆盖的半导体层的源区域侧或漏极区侧形成有轻掺杂杂质区。 使用栅极电极层作为掩模将半导体层以其对面的方式对角地掺杂以形成轻掺杂杂质区域。 因此，可以精细地控制薄膜晶体管的性质。

公开(公告)号：US20050274952A1

公开(公告)日：2005-12-15

申请号：US11148426

申请日：2005-06-09

申请人： Shunpei Yamazaki ,  Atsuo Isobe ,  Tetsuji Yamaguchi ,  Hiromichi Godo

发明人： Shunpei Yamazaki ,  Atsuo Isobe ,  Tetsuji Yamaguchi ,  Hiromichi Godo

IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L21/77 ,  H01L29/10 ,  H01L29/786

CPC分类号： H01L27/1214 ,  H01L21/26586 ,  H01L27/127 ,  H01L27/1274 ,  H01L29/66757 ,  H01L29/78624

摘要： In the invention, a low concentration impurity region is formed between a channel formation region and a source region or a drain region in a semiconductor layer and covered with a gate electrode layer in a thin film transistor The semiconductor layer is doped obliquely to the surface thereof using the gate electrode layer as a mask to form the low concentration impurity region. The semiconductor layer is formed to have an impurity region including an impurity element for imparting one conductivity which is different from conductivity of the thin film transistor, thereby being able to minutely control the properties of the thin film transistor.

摘要翻译： 在本发明中，在半导体层中的沟道形成区域和源极区域或漏极区域之间形成低浓度杂质区域，并且在薄膜晶体管中被栅极电极层覆盖。半导体层倾斜地掺杂在其表面上 使用栅极电极层作为掩模形成低浓度杂质区域。 半导体层形成为具有包含用于赋予与薄膜晶体管的导电性不同的一种导电性的杂质元素的杂质区域，从而能够精细地控制薄膜晶体管的性质。