公开(公告)号：US10529542B2

公开(公告)日：2020-01-07

申请号：US14645234

申请日：2015-03-11

Applicant: ASM IP Holding B.V.

Inventor： Carl Louis White ,  Eric James Shero ,  Mohith Verghese

IPC: H01J37/32 ,  C23C16/455 ,  B08B7/00 ,  C23C16/458

Abstract: Gas-phase reactors and systems are disclosed. Exemplary reactors include a reaction chamber having a tapered height. Tapering the height of the reactor is thought to reduce a pressure drop along the flow of gasses through the reactor. Exemplary reactors can also include a spacer within a gap to control a flow of gas between a region and a reaction chamber.

公开(公告)号：US20200002812A1

公开(公告)日：2020-01-02

申请号：US16454063

申请日：2019-06-27

Applicant: ASM IP Holding B.V.

Inventor： ManSu Lee ,  SungKyu Kang ,  EunSook Lee ,  MinSoo Kim ,  SeungWoo Choi

IPC: C23C16/455 ,  H01L21/033

Abstract: A method of depositing a thin film having a desired etching characteristic while improving a loss amount and loss uniformity of a lower film includes, on the semiconductor substrate and the pattern structure: a first operation of depositing a portion of the thin film by repeating a first cycle comprising (a1) a source gas supply operation, (b1) a reactant gas supply operation, and (c1) a plasma supply operation for a certain number of times; a second operation of depositing a remaining portion of the thin film by repeating a second cycle comprising (a2) a source gas supply operation, (b2) a reactant gas supply operation, and (c2) a plasma supply operation for a certain number of times after the first operation, wherein a supply time of the source gas supply operation (a1) is longer than a supply time of the source gas supply operation (a2).

公开(公告)号：US20190390345A1

公开(公告)日：2019-12-26

申请号：US16014320

申请日：2018-06-21

Applicant: ASM IP Holding B.V.

Inventor： Takashi WADA ,  Satoru NOGUCHI ,  Wataru ADACHI ,  Daisuke MURAMATSU

IPC: C23C16/52 ,  C23C16/455

Abstract: Examples of a substrate processing apparatus includes a device for subjecting a substrate to processing, and a controller for modifying a control parameter predetermined to control the device with a first modification value and a second modification value that vary over time, thereby calculating a modified parameter, and controlling the device based on the modified parameter, wherein the first modification value has a shorter term for modifying the control parameter than the second modification value.

公开(公告)号：US10515795B2

公开(公告)日：2019-12-24

申请号：US15396697

申请日：2017-01-02

Applicant: ASM IP Holding B.V.

Inventor： Young Hoon Kim ,  Dae Youn Kim ,  Sang Wook Lee

IPC: C23C16/455 ,  H01L21/02 ,  C23C16/40 ,  C23C16/452

Abstract: A method of depositing a thin film includes: repeating a first gas supply cycle a first plurality of times, the first gas supply cycle including supplying a source gas to a reaction space; supplying first plasma while supplying a reactant gas to the reaction space; repeating a second gas supply cycle a second plurality of times, the second gas supply cycle including supplying the source gas to the reaction space; and supplying second plasma while supplying the reactant gas to the reaction space, wherein the supplying of the first plasma includes supplying remote plasma, and the supplying of the second plasma includes supplying direct plasma.

公开(公告)号：US10446393B2

公开(公告)日：2019-10-15

申请号：US15957565

申请日：2018-04-19

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  John Tolle ,  Joe Margetis ,  Matthew Goodman ,  Robert Vyne

IPC: H01L21/02 ,  H01L29/66 ,  C30B29/10 ,  C30B25/10 ,  C30B25/02 ,  C30B29/06 ,  C30B29/52

Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.

公开(公告)号：US20190304776A1

公开(公告)日：2019-10-03

申请号：US16255639

申请日：2019-01-23

Applicant: ASM IP Holding B.V.

Inventor： Seung Woo Choi

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/40 ,  C23C16/50 ,  H01L21/311 ,  H01L21/033

Abstract: A substrate processing method capable of uniformly maintaining damage to a pattern structure under a thin film formed on a substrate includes supplying a source material to a substrate on which a pattern structure that is reactive with a reactant is formed; and supplying the reactant through at least a central gas inlet of a supply unit in a plasma atmosphere, wherein, during the supplying of the reactant, a blocking material different from the reactant is supplied through an additional gas inlet that is spaced apart from the central gas inlet of the supply unit, and a flow of the blocking material at the edge of the substrate is increased, thereby increasing a radical density of the reactant near a center of the substrate.

公开(公告)号：US20190295838A1

公开(公告)日：2019-09-26

申请号：US16381634

申请日：2019-04-11

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Viljami Pore ,  Ryoko Yamada ,  Antti Juhani Niskanen

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/04 ,  C23C16/34

Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.

公开(公告)号：US10424476B2

公开(公告)日：2019-09-24

申请号：US15707749

申请日：2017-09-18

Applicant: ASM IP Holding B.V.

Inventor： Toshiya Suzuki ,  Viljami J. Pore

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/311

Abstract: Methods for depositing silicon oxycarbonitride (SiOCN) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor and a second reactant that does not include oxygen. In some embodiments the methods allow for the deposition of SiOCN films having improved acid-based wet etch resistance.

公开(公告)号：US20190283077A1

公开(公告)日：2019-09-19

申请号：US16429750

申请日：2019-06-03

Applicant: ASM IP HOLDING B.V.

Inventor： Viljami J. Pore ,  Marko Tuominen ,  Hannu Huotari

IPC: B05D1/00 ,  H01L21/02 ,  C23C16/455 ,  C23C16/30 ,  B05D1/36

Abstract: Methods and apparatus for vapor deposition of an organic film are configured to vaporize an organic reactant at a first temperature, transport the vapor to a reaction chamber housing a substrate, and maintain the substrate at a lower temperature than the vaporization temperature. Alternating contact of the substrate with the organic reactant and a second reactant in a sequential deposition sequence can result in bottom-up filling of voids and trenches with organic film in a manner otherwise difficult to achieve. Deposition reactors conducive to depositing organic films are provided.

公开(公告)号：US10410943B2

公开(公告)日：2019-09-10

申请号：US15673278

申请日：2017-08-09

Applicant: ASM IP Holding B.V.

Inventor： Xiaoqiang Jiang ,  Fu Tang ,  Qi Xie ,  Pauline Calka ,  Sung-Hoon Jung ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L23/31 ,  H01L23/29 ,  C23C16/455 ,  H01L21/67 ,  C23C16/30 ,  H01L21/306 ,  H01L29/66

Abstract: A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface. The system for passivating a surface of a semiconductor may include a reactor, a metal containing precursor source fluidly coupled to the reactor, and a chalcogenide containing precursor source fluidly couple to the reactor, wherein the metal containing precursor source provides a gas-phase metal containing precursor to a reaction chamber of the reactor, and wherein the chalcogenide containing precursor source provides a gas-phase chalcogenide containing precursor to a reaction chamber of the reactor.