公开(公告)号：US09618653B2

公开(公告)日：2017-04-11

申请号：US13853801

申请日：2013-03-29

Applicant: STMicroelectronics Pte Ltd.

Inventor： Olivier Le Neel ,  Ravi Shankar ,  Suman Cherian

IPC: G01K7/01 ,  G01K7/34 ,  G01W1/02 ,  G01P5/14 ,  G01F1/44

CPC classification number: G01W1/02 ,  G01F1/44 ,  G01P5/14

Abstract: Sensors for air flow, temperature, pressure, and humidity are integrated onto a single semiconductor die within a miniaturized Venturi chamber to provide a microelectronic semiconductor-based environmental multi-sensor module that includes an air flow meter. One or more such multi-sensor modules can be used as building blocks in dedicated application-specific integrated circuits (ASICs) for use in environmental control appliances that rely on measurements of air flow. Furthermore, the sensor module can be built on top of existing circuitry that can be used to process signals from the sensors. By integrating the Venturi chamber with accompanying environmental sensors, correction factors can be obtained and applied to compensate for temporal humidity fluctuations and spatial temperature variation using the Venturi apparatus.

公开(公告)号：US09608029B2

公开(公告)日：2017-03-28

申请号：US13931313

申请日：2013-06-28

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L27/14 ,  H01L31/14 ,  H01L21/00 ,  H01L27/146

CPC classification number: H01L27/14683 ,  H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/16235 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Embodiments of the present invention are directed to optical packages having a cover made of transparent material with a recess formed therein and methods of forming same. The recess may be formed in a periphery portion of the transparent material and may have various shapes and configurations. Adhesive is provided in at least a portion of the recess of the transparent material, which secures the transparent material to an image sensor.

公开(公告)号：US09596748B2

公开(公告)日：2017-03-14

申请号：US13852373

申请日：2013-03-28

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wee Chin Judy Lim

IPC: H05K1/02 ,  H05K9/00

CPC classification number: H05K1/0215 ,  H05K9/0024 ,  H05K9/0039 ,  H05K2201/2018 ,  Y10T29/49124

Abstract: A lens mount is attached to a circuit board and covers electrical components on the circuit board. An electrically insulating device is positioned between the lens mount and the circuit board. The circuit board includes a grounding pad adjacent the electrically insulating device. The lens mount includes an aperture aligned with the grounding pad and the electrically insulating device. A conductive glue is dispensed into the aperture to electrically ground the lens mount to the grounding pad. The electrically insulating device seals the conductive glue from the electrical components. A method of grounding a lens mount to a circuit board is provided.

Abstract translation: 镜头座安装在电路板上并覆盖电路板上的电气部件。 电绝缘装置位于透镜支架和电路板之间。 电路板包括邻近电绝缘装置的接地垫。 透镜座包括与接地垫和电绝缘装置对准的孔。 将导电胶分配到孔中以将透镜安装座电接地到接地垫。 电绝缘装置将导电胶从电气部件密封。 提供了一种将透镜座连接到电路板的方法。

公开(公告)号：US09543282B2

公开(公告)日：2017-01-10

申请号：US14083102

申请日：2013-11-18

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L25/16 ,  H01L23/00

CPC classification number: H01L25/167 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/16151 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: One or more embodiments are directed to system in package (SiP) for optical devices, including proximity sensor packaging. One embodiment is directed to an optical package that includes a stacked arrangement with a plurality of optical devices arranged over an image sensor processor die that is coupled to a first substrate. Between the two optical devices and the image sensor processor die there is provided at least a second substrate. In one embodiment, the optical package is a proximity sensor package and the optical devices include a light-emitting diode die and a light-receiving diode die. In one embodiment, the light-emitting diode die is secured to a surface of the second substrate and the light-receiving diode die is secured to a surface of a third substrate. The second and the third substrate may be secured to a surface of the image sensor processor die or to a surface of encapsulation material.

Abstract translation: 一个或多个实施例涉及用于光学装置的包装系统（SiP），包括接近传感器封装。 一个实施例涉及一种光学封装，其包括具有布置在耦合到第一衬底的图像传感器处理器裸片上的多个光学器件的堆叠布置。 在两个光学器件和图像传感器处理器管芯之间提供至少第二衬底。 在一个实施例中，光学封装是接近传感器封装，并且光学器件包括发光二极管管芯和光接收二极管管芯。 在一个实施例中，发光二极管管芯固定到第二衬底的表面，并且光接收二极管管芯固定到第三衬底的表面。 第二和第三基板可以固定到图像传感器处理器管芯的表面或者封装材料的表面。

公开(公告)号：US09530675B2

公开(公告)日：2016-12-27

申请号：US13622556

申请日：2012-09-19

Applicant: STMicroelectronics Pte Ltd.

Inventor： Romolo Recorba Bactasa

IPC: H01L21/673 ,  H05K13/00

CPC classification number: H01L21/67309 ,  H01L21/67303 ,  H05K13/0084 ,  Y10T29/49826

Abstract: A wafer handling station includes a housing defining a chamber, and a wafer cassette assembly positionable in the chamber. The wafer cassette assembly includes a vertical support, and cassette members carried by the vertical support in spaced relation. Each cassette member includes a base coupled to the vertical support, wafer contact pads on an upper surface of the base and configured to support a wafer thereon, and a pair of wafer brackets carried by the base and configured to engage respective edges of the wafer to laterally confine the wafer.

Abstract translation: 晶片处理站包括限定腔室的壳体和可定位在腔室中的晶片盒组件。 晶片盒组件包括垂直支撑件和由垂直支撑件以间隔关系承载的盒构件。 每个盒构件包括联接到垂直支撑件的基座，在基座的上表面上的晶片接触垫，并且被配置为在其上支撑晶片，以及一对晶片支架，其由基座承载并且被配置为将晶片的相应边缘接合到 横向限制晶片。

公开(公告)号：US09449912B1

公开(公告)日：2016-09-20

申请号：US14736353

申请日：2015-06-11

Applicant: STMICROELECTRONICS PTE LTD ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Xueren Zhang ,  Kim-Yong Goh ,  Roseanne Duca

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L24/06 ,  G06K19/07728 ,  G06K19/07745 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49855 ,  H01L23/49888 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/0665

Abstract: An integrated circuit (IC) module for an IC card includes a plurality of IC card contacts in side-by-side relation. A dielectric support layer is above the contact layer and has a plurality of openings and a first coefficient of thermal expansion (CTE). An IC die is above the dielectric support layer and includes a plurality of bond pads. A bond wire extends from a respective bond pad to a corresponding contact through an adjacent opening in the dielectric support layer. A respective body of fill material is within each opening and has a second CTE. A mold compound body is above the dielectric support layer, the bodies of fill material, and surrounding the IC die. The mold compound body has a third CTE. The first CTE is closer to the second CTE than to the third CTE.

Abstract translation: 用于IC卡的集成电路（IC）模块包括并排关系的多个IC卡触点。 介电支撑层位于接触层之上，并具有多个开口和第一热膨胀系数（CTE）。 IC芯片在电介质支撑层之上，并且包括多个接合焊盘。 接合线通过介电支撑层中的相邻开口从相应的接合焊盘延伸到相应的接触。 相应的填充材料体在每个开口内并且具有第二CTE。 模具复合体在电介质支撑层上方，填充物体，并围绕IC芯片。 模具复合体具有第三CTE。 第一个CTE比第三个CTE更接近第二个CTE。

公开(公告)号：US09252030B1

公开(公告)日：2016-02-02

申请号：US14450554

申请日：2014-08-04

Applicant: STMicroelectronics Pte Ltd

Inventor： Yonggang Jin

IPC: H01L23/49 ,  H01L21/56 ,  H01L25/00 ,  H01L21/48 ,  H01L21/78 ,  H01L23/498 ,  H01L25/07

CPC classification number: H01L21/563 ,  H01L21/4803 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49861 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/072 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83

Abstract: One or more embodiments are directed to a system-in-package (SiP) that includes a plurality of semiconductor chips and an interposer that that are molded in an encapsulation layer together. That is, a single processing step may be used to encapsulate the semiconductor chips and the interposer in the encapsulation layer. Furthermore, prior to setting or curing, the encapsulation layer is able to flow between the semiconductor chips and the interposer to provide further mechanical support for the semiconductor chips. Thus, the process for forming the SiP is reduced, resulting in a faster processing time and a lower cost. Additionally, one or more embodiments described herein reduce or eliminate warpage of the interposer.

Abstract translation: 一个或多个实施例涉及包括多个半导体芯片的系统级封装（SiP）和在封装层中一起模塑的插入器。 也就是说，可以使用单个处理步骤来将半导体芯片和插入器封装在封装层中。 此外，在固化或固化之前，封装层能够在半导体芯片和插入件之间流动，以为半导体芯片提供进一步的机械支撑。 因此，形成SiP的工艺减少，加工时间更短，成本更低。 此外，本文所述的一个或多个实施例减少或消除插入件的翘曲。

公开(公告)号：US09236243B2

公开(公告)日：2016-01-12

申请号：US14151188

申请日：2014-01-09

Applicant: STMICROELECTRONICS PTE LTD

Inventor： ChongJieh Chew

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/033

CPC classification number: H01L21/02252 ,  H01L21/02129 ,  H01L21/02274 ,  H01L21/02321 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/033 ,  H01L21/31144

Abstract: A method for making semiconductor devices may include forming a phosphosilicate glass (PSG) layer on a semiconductor wafer, with the PSG layer having a phosphine residual surface portion. The method may further include exposing the phosphine residual surface portion to a reactant plasma to integrate at least some of the phosphine residual surface portion into the PSG layer. The method may additionally include forming a mask layer on the PSG layer after the exposing.

Abstract translation: 制造半导体器件的方法可以包括在半导体晶片上形成磷硅玻璃（PSG）层，其中PSG层具有磷化氢残留表面部分。 该方法可以进一步包括将磷化氢残余表面部分暴露于反应物等离子体以将至少一些磷化氢残余表面部分整合到PSG层中。 该方法还可以包括在曝光之后在PSG层上形成掩模层。

公开(公告)号：US20150235929A1

公开(公告)日：2015-08-20

申请号：US14615673

申请日：2015-02-06

Applicant: STMicroelectronics (Malta) Ltd ,  STMicroelectronics S.r.I. ,  STMicroelectronics Pte Ltd

Inventor： Roseanne Duca ,  Valter Motta ,  Xueren Zhang ,  Kim-Yong Goh

IPC: H01L23/495

CPC classification number: H01L23/49568 ,  H01L23/4334 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2924/18301 ,  H01L2924/00014

Abstract: An electronic device includes an integrated circuit chip mounted to a heat slug. The heat slug has a peripheral region having first thickness along a first direction, the peripheral region surrounding a recess region (having a second, smaller, thickness along the first direction) that defines a chip mounting surface along a second direction perpendicular to the first direction. The recess region defines side borders and a nook extends into the heat slug along the side borders. An insulating body embeds the integrated circuit one chip and heat slug. Material of the insulating body fills the nook.

Abstract translation: 一种电子设备包括安装在散热片上的集成电路芯片。 散热片具有沿着第一方向具有第一厚度的周边区域，周边区域围绕沿着垂直于第一方向的第二方向限定芯片安装表面的凹陷区域（具有沿着第一方向的第二较小厚度） 。 凹槽区域限定侧面边界，并且角部沿着侧边缘延伸到热塞中。 绝缘体嵌入集成电路一芯片和散热片。 绝缘体的材料填充角。

公开(公告)号：US09016836B2

公开(公告)日：2015-04-28

申请号：US13893472

申请日：2013-05-14

Applicant: STMicroelectronics Asia Pacific Pte. Ltd. ,  STMicroelectronics, Inc. ,  STMicroelectronics Pte. Ltd.

Inventor： Madanagopal Kunnavakkam ,  Jin Zhi Li ,  Teck Khim Neo ,  Kenneth W. Smiley ,  Chun Chek Bong

IPC: B41J2/05 ,  B41J2/14

CPC classification number: B41J2/14129 ,  B41J2/14072 ,  B41J2002/14387

Abstract: An ink jet printhead device includes a substrate and a plurality of thermal resistors on the substrate. Each thermal resistor includes first and second electrodes and a resistive layer extending therebetween. A polarity-changing driver is coupled to the plurality of thermal resistors and configured to change a driving polarity between the first and second electrodes of each of the plurality of thermal resistors.

Abstract translation: 喷墨打印头装置包括基板和基板上的多个热电阻器。 每个热敏电阻器包括第一和第二电极以及在它们之间延伸的电阻层。 极性改变驱动器耦合到多个热电阻器并且被配置为改变多个热电阻器中的每一个的第一和第二电极之间的驱动极性。