公开(公告)号：US09016836B2

公开(公告)日：2015-04-28

申请号：US13893472

申请日：2013-05-14

Applicant: STMicroelectronics Asia Pacific Pte. Ltd. ,  STMicroelectronics, Inc. ,  STMicroelectronics Pte. Ltd.

Inventor： Madanagopal Kunnavakkam ,  Jin Zhi Li ,  Teck Khim Neo ,  Kenneth W. Smiley ,  Chun Chek Bong

IPC: B41J2/05 ,  B41J2/14

CPC classification number: B41J2/14129 ,  B41J2/14072 ,  B41J2002/14387

Abstract: An ink jet printhead device includes a substrate and a plurality of thermal resistors on the substrate. Each thermal resistor includes first and second electrodes and a resistive layer extending therebetween. A polarity-changing driver is coupled to the plurality of thermal resistors and configured to change a driving polarity between the first and second electrodes of each of the plurality of thermal resistors.

Abstract translation: 喷墨打印头装置包括基板和基板上的多个热电阻器。 每个热敏电阻器包括第一和第二电极以及在它们之间延伸的电阻层。 极性改变驱动器耦合到多个热电阻器并且被配置为改变多个热电阻器中的每一个的第一和第二电极之间的驱动极性。

公开(公告)号：US09000542B2

公开(公告)日：2015-04-07

申请号：US13907708

申请日：2013-05-31

Applicant: STMicroelectronics Pte Ltd.

Inventor： Tien Choy Loh ,  Olivier Le Neel

IPC: H01L27/14 ,  H01L29/84 ,  H01L31/058 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81C1/00158 ,  B81B3/0021 ,  B81B2203/0127

Abstract: The present disclosure is directed to a device that includes a substrate and a sensor formed on the substrate. The sensor includes a chamber formed from a plurality of integrated cavities, a membrane above the substrate, the membrane having a plurality of openings, each opening positioned above one of the cavities, and a plurality of diamond shaped anchors positioned between the membrane and the substrate, the anchors positioned between each of the cavities. A center of each opening is also a center of one of the cavities.

Abstract translation: 本公开涉及一种包括基板和形成在基板上的传感器的装置。 所述传感器包括由多个集成腔体形成的室，在所述衬底上方的膜，所述膜具有多个开口，每个开口位于所述空腔中的一个上方，以及多个位于所述膜和所述衬底之间的菱形锚定件 ，定位在每个空腔之间的锚固件。 每个开口的中心也是其中一个空腔的中心。

公开(公告)号：US20150084171A1

公开(公告)日：2015-03-26

申请号：US14034121

申请日：2013-09-23

Applicant: STMicroelectronics Pte. Ltd.

Inventor： Yiyi Ma ,  Kim-Yong Goh ,  Xueren Zhang

IPC: H01L23/495

CPC classification number: H01L21/4832 ,  H01L21/486 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24101 ,  H01L2224/24247 ,  H01L2224/25171 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82106 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A non-lead (QFN) semiconductor package is disclosed. The package includes a die attach pad and a semiconductor die supported by the die attached pad. The semiconductor die includes a plurality of pads on an active surface thereof. The package further includes a plurality of terminal leads, an encapsulant that encapsulates the semiconductor die, and a redistribution layer including a plurality of interconnections electrically connecting the pads to the terminal leads. A method of making the package is also disclosed.

Abstract translation: 公开了一种非引线（QFN）半导体封装。 封装包括管芯附接焊盘和由管芯附接焊盘支撑的半导体管芯。 半导体管芯包括在其有效表面上的多个焊盘。 该封装还包括多个端子引线，封装半导体管芯的密封剂，以及包括将焊盘电连接到端子引线的多个互连的再分配层。 还公开了制造包装的方法。

公开(公告)号：US20150035133A1

公开(公告)日：2015-02-05

申请号：US13958146

申请日：2013-08-02

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L23/04 ,  H01L23/00 ,  H01L21/82

CPC classification number: H01L23/04 ,  H01L21/10 ,  H01L21/82 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14625 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85005 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/16788 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method is described for making electronic modules includes molding onto a substrate panel a matrix panel defining a plurality of cavities, attaching semiconductor die to the substrate panel in respective cavities of the molded matrix panel, electrically connecting the semiconductor die to the substrate panel, affixing a cover to the molded matrix panel to form an electronic module assembly, mounting the electronic module assembly on a carrier tape, and separating the electronic module assembly into individual electronic modules. An electronic module is described which includes a substrate, a wall member molded onto the substrate, the molded wall member defining a cavity, at least one semiconductor die attached to the substrate in the cavity and electrically connected to the substrate, and a cover affixed to the molded wall member over the cavity.

Abstract translation: 描述了一种用于制造电子模块的方法，包括将限定多个空腔的矩阵面板模制到基板上，将半导体管芯附着到模制矩阵面板的相应空腔中的基板面板，将半导体管芯电连接到基板面板， 模制矩阵面板的盖子以形成电子模块组件，将电子模块组件安装在载带上，以及将电子模块组件分离成各个电子模块。 描述了一种电子模块，其包括衬底，模制在衬底上的壁构件，限定空腔的模制壁构件，至少一个连接到空腔中的衬底并电连接到衬底的半导体管芯，以及固定到 模制的壁构件在空腔上。

公开(公告)号：US08860228B2

公开(公告)日：2014-10-14

申请号：US13727206

申请日：2012-12-26

Applicant: STMicroelectronics Pte. Ltd

Inventor： Yonggang Jin ,  Yun Liu ,  Yaohuang Huang

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L24/19 ,  H01L23/3128 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/18162 ,  H01L2924/00

Abstract: An electronic device may include a bottom interconnect layer having a first electrically conductive via therein. The electronic device may also include an integrated circuit (IC) carried by said bottom interconnect layer, and an encapsulation material on the bottom interconnect layer and surrounding the IC. The encapsulation layer may have a second electrically conductive via therein aligned with the first electrically conductive via. The second electrically conductive via may have a cross-sectional area larger than a cross-sectional area of the first electrically conductive via.

Abstract translation: 电子器件可以包括其中具有第一导电通孔的底部互连层。 电子设备还可以包括由所述底部互连层承载的集成电路（IC）和在底部互连层上并围绕IC的封装材料。 封装层可以具有与第一导电通孔对准的第二导电通孔。 第二导电通孔的横截面积可以大于第一导电通孔的横截面面积。

公开(公告)号：US20140293120A1

公开(公告)日：2014-10-02

申请号：US13853598

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Hk Looi ,  Wee Chin Judy Lim ,  Cheng-Hai Cheh ,  Bs Aw ,  David Gani ,  Tin-Tun Maung ,  Choon Lee Lai

IPC: H04N5/225 ,  G03B3/10 ,  G02B7/09

CPC classification number: G03B3/10 ,  G02B7/08 ,  G02B7/09 ,  H02K41/031 ,  Y10T29/4913

Abstract: Described herein are various embodiments of contacts that include different portions angled with respect to one another and methods of manufacturing devices that include such contacts. In some embodiments, a module may include a first portion of a contact that is disposed within a housing and a second portion that is disposed outside of the housing, with the second portion angled with respect to the first portion. Manufacturing such devices may include depositing a conductive material to electrically connect the contact to a contact pad of a substrate. In some embodiments, a deposition process for depositing the conductive material may have a minimum dimension, which defines a minimum dimension of a conductive material once deposited. In some such embodiments, a distance between a terminal end of the contact pin and the contact pad may be greater than the minimum dimension of the deposition process.

Abstract translation: 这里描述的触点的各种实施例包括相对于彼此成角度的不同部分和制造包括这种触点的装置的方法。 在一些实施例中，模块可以包括设置在壳体内的接触件的第一部分和设置在壳体外部的第二部分，其中第二部分相对于第一部分成角度。 制造这样的器件可以包括沉积导电材料以将触点电连接到衬底的接触焊盘。 在一些实施例中，用于沉积导电材料的沉积工艺可以具有最小尺寸，其限定一旦沉积的导电材料的最小尺寸。 在一些这样的实施例中，接触针的末端与接触垫之间的距离可以大于沉积过程的最小尺寸。

公开(公告)号：US20140291829A1

公开(公告)日：2014-10-02

申请号：US13853886

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Olivier Le Neel ,  Shian-Yeu Kam ,  Tien-Choy Loh ,  Ditto Adnan ,  Tze Wei Dennis Chew

IPC: H01L25/16 ,  H01L21/56

CPC classification number: H01L25/16 ,  B81C1/0023 ,  G01N27/223 ,  H01L21/56 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/00 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/854 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A micro-sensor device that includes a passivation-protected ASIC module and a micro-sensor module bonded to a patterned cap provides protection for signal conditioning circuitry while allowing one or more sensing elements in the micro-sensor module to be exposed to an ambient environment. According to a method of fabricating the micro-sensor device, the patterned cap can be bonded to the micro-sensor module using a planarizing adhesive that is chemically compatible with the sensing elements. In one embodiment, the adhesive material is the same material used for the dielectric active elements, for example, a photo-sensitive polyimide film.

Abstract translation: 包括钝化保护ASIC模块和结合到图案化盖的微传感器模块的微传感器装置为信号调节电路提供保护，同时允许微传感器模块中的一个或多个感测元件暴露于周围环境 。 根据制造微传感器装置的方法，图案化盖可以使用与感测元件化学相容的平面化粘合剂结合到微传感器模块。 在一个实施例中，粘合剂材料是用于介电活性元件的材料，例如光敏聚酰亚胺膜。

公开(公告)号：US20140291677A1

公开(公告)日：2014-10-02

申请号：US13853732

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Olivier Le Neel ,  Ravi Shankar ,  Suman Cherian ,  Calvin Leung ,  Tien-Choy Loh ,  Shian-Yeu Kam

IPC: G01K7/16 ,  G01N27/22 ,  G01L9/12 ,  H01L25/065 ,  H01L25/00

CPC classification number: G01N27/223 ,  G01D21/02 ,  G01K7/01 ,  G01K7/16 ,  G01K7/186 ,  G01K7/20 ,  G01L9/12 ,  G01L19/0092 ,  H01L25/0652 ,  H01L25/50 ,  H01L27/0248 ,  H01L29/7804 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor-based multi-sensor module integrates miniature temperature, pressure, and humidity sensors onto a single substrate. Pressure and humidity sensors can be implemented as capacitive thin film sensors, while the temperature sensor is implemented as a precision miniature Wheatstone bridge. Such multi-sensor modules can be used as building blocks in application-specific integrated circuits (ASICs). Furthermore, the multi-sensor module can be built on top of existing circuitry that can be used to process signals from the sensors. An integrated multi-sensor module that uses differential sensors can measure a variety of localized ambient environmental conditions substantially simultaneously, and with a high level of precision. The multi-sensor module also features an integrated heater that can be used to calibrate or to adjust the sensors, either automatically or as needed. Such a miniature integrated multi-sensor module that features low power consumption can be used in medical monitoring and mobile computing, including smart phone applications.

Abstract translation: 基于半导体的多传感器模块将微型温度，压力和湿度传感器集成在单个基板上。 压力和湿度传感器可以实现为电容薄膜传感器，而温度传感器实现为精密微型惠斯通电桥。 这种多传感器模块可以用作专用集成电路（ASIC）中的构建块。 此外，多传感器模块可以构建在可用于处理来自传感器的信号的现有电路之上。 使用差分传感器的集成多传感器模块可以大量同时测量各种局部环境条件，并以高精度测量。 多传感器模块还具有集成加热器，可用于自动或根据需要校准或调整传感器。 这种具有低功耗的微型集成多传感器模块可用于医疗监控和移动计算，包括智能手机应用。

公开(公告)号：US20140252507A1

公开(公告)日：2014-09-11

申请号：US13785938

申请日：2013-03-05

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Ravi Shankar ,  Olivier Le Neel ,  Shian Yeu Kam ,  Tien Choy Loh

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00293 ,  B81B7/0041 ,  B81C2203/0136

Abstract: Embodiments of the present disclosure are related to MEMS devices having a suspended membrane that are secured to and spaced apart from a substrate with a sealed cavity therebetween. The membrane includes openings with sidewalls that are closed by a dielectric material. In various embodiments, the cavity between the membrane and the substrate is formed by removing a sacrificial layer through the openings. In one or more embodiments, the openings in the membrane are closed by depositing the dielectric material on the sidewalls of the openings and the upper surface of the membrane.

Abstract translation: 本公开的实施例涉及具有悬置膜的MEMS器件，其被固定到衬底上并与衬底间隔开密封腔。 膜包括具有由介电材料封闭的侧壁的开口。 在各种实施例中，通过从开口去除牺牲层来形成膜与衬底之间的空腔。 在一个或多个实施例中，通过将介电材料沉积在开口的侧壁和膜的上表面上来封闭膜中的开口。

公开(公告)号：US20140113410A1

公开(公告)日：2014-04-24

申请号：US13655036

申请日：2012-10-18

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： How Yuan Hwang ,  Jay Maghirang ,  Yaohuang Huang ,  Kim-Yong Goh ,  Phone Maw Hla ,  Edmond Soon

IPC: H01L21/60

CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L24/11 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L2224/02372 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2224/9211 ,  H01L2224/96 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are related to manufacturing system-in-packages at wafer-level. In particular, various embodiments are directed to adhering a first wafer to a second wafer and adhering solder balls to contact pads of the first wafer. In one embodiment, a first wafer having first and second surfaces is provided. The first wafer includes bond pads located on the first surface that are coupled to a respective semiconductor device located in the first wafer. A second wafer having an electrical component located therein is provided. A conductive adhesive is provided on at least one of the first wafer and the second wafer. Conductive balls are provided on the bond pads on the first surface of the first wafer. The conductive balls and the conductive adhesive are heated to cause the conductive balls to adhere to the bond pad and the conductive adhesive to adhere the first wafer to the second wafer.

Abstract translation: 本公开的实施例涉及在晶片级制造系统级封装。 具体地，各种实施例涉及将第一晶片粘附到第二晶片并将焊球粘附到第一晶片的接触焊盘。 在一个实施例中，提供具有第一和第二表面的第一晶片。 第一晶片包括位于第一表面上的接合焊盘，其耦合到位于第一晶片中的相应半导体器件。 提供了具有位于其中的电气部件的第二晶片。 在第一晶片和第二晶片中的至少一个上提供导电粘合剂。 导电球设置在第一晶片的第一表面上的接合焊盘上。 导电球和导电粘合剂被加热以使导电球粘附到接合焊盘和导电粘合剂以将第一晶片粘附到第二晶片。