公开(公告)号：US09263964B1

公开(公告)日：2016-02-16

申请号：US13972102

申请日：2013-08-21

Applicant: Cirrus Logic, Inc.

Inventor： Michael A. Kost ,  Wesley L. Mokry ,  Prashanth Drakshapalli ,  Stephen T. Hodapp ,  Firas Azrai

IPC: H05B37/00 ,  H02M7/06 ,  H05B33/08

CPC classification number: H02M7/06 ,  H02M1/36 ,  H02M2001/0006 ,  H05B33/0809 ,  H05B33/0815

Abstract: In accordance with systems and methods of the present disclosure, an apparatus for providing compatibility between a load having a reactive impedance and a secondary winding of an electronic transformer may include a power converter and a circuit. The power converter may be configured to transfer electrical energy from the secondary winding to the load. The circuit may be configured to charge an energy storage device coupled to the power converter following start-up of the electronic transformer in order to increase a voltage of the energy storage device to at least a voltage level sufficient for the electronic transformer to enter steady-state operation.

Abstract translation: 根据本公开的系统和方法，用于提供具有无功阻抗的负载和电子变压器的次级绕组之间的兼容性的装置可以包括功率转换器和电路。 功率转换器可以被配置为将电能从次级绕组传递到负载。 电路可以被配置为对电子变压器起动之后耦合到功率转换器的能量存储装置进行充电，以便将能量存储装置的电压增加到至少足以使电子变压器进入稳定电压的电压， 状态操作。

公开(公告)号：US09258001B1

公开(公告)日：2016-02-09

申请号：US14016972

申请日：2013-09-03

Applicant: Cirrus Logic, Inc.

Inventor： Tejasvi Das ,  Alvin C. Storvik

IPC: H03L7/087 ,  H03L7/093 ,  H03L7/14 ,  H03L7/10 ,  H03L7/107

CPC classification number: H03L7/148 ,  H03L7/087 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/103 ,  H03L7/105 ,  H03L7/1075 ,  H03L7/146 ,  H03L7/18 ,  H03L7/22 ,  H03L2207/06

Abstract: An oscillator of a phase-locked loop (PLL) or frequency-locked loop (FLL) may include two inputs. The two inputs may include a first analog input and a second digital input. The second digital input may receive a digital signal setting a desired output clock frequency of the oscillator and/or indicating an approximate frequency of frequency range for output by the oscillator. The first analog input may receive a voltage representative of a desired frequency for the output clock frequency of the PLL or FLL to fine-tune the output frequency from the approximate frequency set by the second digital input. The first analog input may be generated from a master clock input signal. When the master clock input signal disappears, the second digital signal controls the output frequency of the oscillator to allow redundant operation of the PLL or FLL even when no master clock input signal is present.

Abstract translation: 锁相环（PLL）或锁频环（FLL）的振荡器可以包括两个输入。 两个输入可以包括第一模拟输入和第二数字输入。 第二数字输入可以接收设置振荡器的期望输出时钟频率的数字信号和/或指示振荡器输出的频率范围的近似频率。 第一模拟输入可以接收代表PLL或FLL的输出时钟频率的期望频率的电压，以从由第二数字输入设置的近似频率微调输出频率。 第一模拟输入可以从主时钟输入信号产生。 当主时钟输入信号消失时，即使没有主时钟输入信号，第二数字信号控制振荡器的输出频率，以允许PLL或FLL的冗余操作。

公开(公告)号：US09240725B2

公开(公告)日：2016-01-19

申请号：US14102809

申请日：2013-12-11

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Eric J. King

IPC: G05F1/00 ,  H02M3/335 ,  H02M1/36 ,  H05B33/08 ,  H02M1/00

CPC classification number: H02M7/06 ,  H02M1/36 ,  H02M3/33507 ,  H02M2001/0006 ,  H05B33/0815 ,  Y02B20/346 ,  Y10T307/352 ,  Y10T307/50

Abstract: A system and method includes a controller that is configured to coordinate (i) a low impedance path for a dimmer current, (ii), control of switch mode power conversion and (iii) an inactive state to, for example, to allow a dimmer to function normally from cycle to cycle of an alternating current (AC) supply voltage. In at least one embodiment, the dimmer functions normally when the dimmer conducts at a correct phase angle indicated by a dimmer input setting and avoids prematurely resetting while conducting. In at least one embodiment, by coordinating functions (i), (ii), and (iii), the controller controls a power converter system that is compatible with a triac-based dimmer. In at least one embodiment, the controller coordinates functions (i), (ii), and (iii) in response to a particular dimming level indicated by a phase cut, rectified input voltage supplied to the power converter system.

公开(公告)号：US09225252B2

公开(公告)日：2015-12-29

申请号：US14203755

申请日：2014-03-11

Applicant: Cirrus Logic, Inc.

Inventor： Prashanth Drakshapalli ,  Rahul Singh ,  Siddharth Maru ,  John L. Melanson

IPC: H05B37/02 ,  H02M3/335 ,  H05B33/08

CPC classification number: H02M3/33507 ,  H05B33/0815 ,  Y02B20/347

Abstract: A power distribution system and method includes a controller that is configured to control a switching power converter. In at least one embodiment, the controller includes a compensation current control circuit to control a compensation current that reduces and, in at least one embodiment, approximately eliminates variations in current drawn by the controller during a particular operational time period. In at least one embodiment, the power distribution system is a lamp that includes the controller, a switching power converter, and one or more light sources, such as light emitting diodes.

Abstract translation: 配电系统和方法包括配置成控制开关功率转换器的控制器。 在至少一个实施例中，控制器包括补偿电流控制电路，用于控制减小的补偿电流，并且在至少一个实施例中，大致消除了在特定操作时间段期间控制器所绘制的电流的变化。 在至少一个实施例中，配电系统是包括控制器，开关功率转换器和一个或多个光源（诸如发光二极管）的灯。

公开(公告)号：US09215532B2

公开(公告)日：2015-12-15

申请号：US13915780

申请日：2013-06-12

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Eric Swanson

IPC: H04R9/08 ,  H04R19/04 ,  H04R1/04 ,  H04W52/02 ,  H04R3/00 ,  H04R3/04 ,  H04R19/02 ,  H04M1/00 ,  H04R1/10

CPC classification number: H04R3/005 ,  H04R1/04 ,  H04R1/1041 ,  H04R3/04 ,  H04R19/02 ,  H04R19/04 ,  H04R2400/01 ,  H04R2499/11 ,  H04W52/0251 ,  H04W52/0254 ,  Y02D70/00 ,  Y02D70/1262 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/164 ,  Y02D70/168

Abstract: In accordance with methods and systems of the present disclosure, a mobile device may include an enclosure adapted such that the enclosure is readily transported by a user of the mobile device, a speaker associated with the enclosure for generating sound, and a controller within the enclosure, communicatively coupled to the speaker. The controller may be configured to receive a signal from the speaker, the signal induced at least in part by sound incident on the speaker other than sound generated by the speaker and process the signal.

公开(公告)号：US09214948B2

公开(公告)日：2015-12-15

申请号：US14255912

申请日：2014-04-17

Applicant: Cirrus Logic, Inc.

Inventor： Ku He ,  Xin Zhao ,  Xiaofan Fei

IPC: H03M1/12 ,  H03M1/00 ,  H03M1/36

CPC classification number: H03M1/002 ,  H03M1/0809 ,  H03M1/181 ,  H03M1/36

Abstract: A comparator tracking scheme for an analog-to-digital converter (ADC) may implement a dynamic window size by varying, over time, a number of comparators powered up to convert an analog input signal to a digital output signal. A comparator-tracking scheme may be implemented, for example, in a controller coupled to a plurality of comparators in an ADC. For example, the controller may determine a window size for the ADC and determine a window position for the ADC. The controller may then activate comparators of the ADC within a window centered at the window position and having a width of the window size. The controller may determine a window size by analyzing an output of a filter. When the filter output indicates a rapidly changing analog input signal, the controller may dynamically increase a window size of the ADC, which may increase a number of comparators powered on.

Abstract translation: 用于模数转换器（ADC）的比较器跟踪方案可以通过随时间变化多个比较器供电以将模拟输入信号转换为数字输出信号来实现动态窗口尺寸。 比较器跟踪方案可以例如在耦合到ADC中的多个比较器的控制器中实现。 例如，控制器可以确定ADC的窗口大小并确定ADC的窗口位置。 然后，控制器可以在以窗口位置为中心并且具有窗口大小的宽度的窗口内激活ADC的比较器。 控制器可以通过分析滤波器的输出来确定窗口大小。 当滤波器输出指示快速变化的模拟输入信号时，控制器可以动态增加ADC的窗口大小，这可能会增加多个比较器上电。

公开(公告)号：US20150340955A1

公开(公告)日：2015-11-26

申请号：US14701791

申请日：2015-05-01

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Zhaohui He

IPC: H02M3/335

CPC classification number: H02M3/33507 ,  H02M3/33523 ,  H02M2001/0003 ,  H02M2001/007 ,  H05B33/0815 ,  Y02B20/346

Abstract: An electronic system includes a controller to provide at least dual-mode conduction control of a switching power converter. In at least one embodiment, the controller is capable to control transitions between discontinuous conduction mode (DCM) and critical conduction mode (CRM) of the switching power converter using a measured switching time parameter having a value corresponding with an approximately peak voltage of a time-varying supply voltage supplied to the switching power converter. In at least one embodiment, the controller dynamically compensates for changing parameters of the electronic system by dynamically determining a minimum non-conductive time of the control switch of the switching power converter using the measured switching time parameter value at approximately the peak of the supply voltage of the supply voltage.

Abstract translation: 电子系统包括控制器，用于至少提供开关功率转换器的双模式导通控制。 在至少一个实施例中，控制器能够使用具有对应于一个时间的近似峰值电压的值的测量的开关时间参数来控制开关功率转换器的不连续导通模式（DCM）和临界导通模式（CRM）之间的转换 - 提供给开关电源转换器的电源电压。 在至少一个实施例中，控制器通过动态地确定开关功率转换器的控制开关的最小非导通时间，在大约电源电压的峰值处使用测量的开关时间参数值来动态地补偿电子系统的变化参数 的电源电压。

公开(公告)号：US09185767B2

公开(公告)日：2015-11-10

申请号：US14158445

申请日：2014-01-17

Applicant: Cirrus Logic, Inc.

Inventor： Ramin Zanbaghi ,  Arnab Kumar Dutta ,  Firas Azrai

IPC: H05B41/36 ,  H05B33/08 ,  H02M7/5383

CPC classification number: H05B33/0872 ,  H02M7/5383 ,  H05B33/0815 ,  H05B33/0866 ,  Y02B20/347 ,  Y02B70/1441

Abstract: A self-oscillating resonator (SOR) may be used to control current through light emitting diodes (LEDs). The SOR may be started and stopped by a controller coupled to a transistor switch in the SOR. The controller may output a control signal that starts and stops the SOR by coupling a supply voltage or a ground to a base of the transistor switch in the SOR. Additional control over the current output to the LEDs may be gained through a resistive DAC coupled to the SOR and duty cycling the SOR.

Abstract translation: 自振荡谐振器（SOR）可用于控制通过发光二极管（LED）的电流。 SOR可以由耦合到SOR中的晶体管开关的控制器启动和停止。 控制器可以通过在SOR中将电源电压或接地耦合到晶体管开关的基极来输出启动和停止SOR的控制信号。 可以通过耦合到SOR的电阻式DAC和SOR负载来获得对LED的电流输出的额外控制。

公开(公告)号：US09184666B2

公开(公告)日：2015-11-10

申请号：US13833587

申请日：2013-03-15

Applicant: Cirrus Logic, Inc.

Inventor： Mohit Sood ,  Spencer Isaacson ,  Rahul Singh ,  Zhaohui He

IPC: H05B37/02 ,  H05B39/04 ,  H05B41/36 ,  H02M3/335 ,  H03K17/14 ,  H05B33/08

CPC classification number: H02M3/33523 ,  H02M3/335 ,  H03K17/145 ,  H05B33/0815 ,  H05B33/0848 ,  H05B33/0884 ,  Y02B20/341 ,  Y10T307/406 ,  Y10T307/832

Abstract: A system and method include a controller that reduces power dissipated by a switch, such as a source-controlled field effect transistor, when an estimated amount of power dissipated by the switch exceeds a predetermined threshold. Reducing the power dissipated by the switch prevents damage to the switch due to overheating. The controller determines the estimated amount of power dissipated by the switch using actual drain-to-source current and drain voltage data. In at least one embodiment, the controller includes a fail-safe, estimated power dissipation determination path that activates when the drain voltage data fails a reliability test. Additionally, in at least one embodiment, the controller includes a model of thermal characteristics of the switch. In at least one embodiment, the controller utilizes real-time estimated power dissipation by the switch and the model to determine when the estimated power dissipated by the switch exceeds a power dissipation protection threshold.

Abstract translation: 一种系统和方法包括当由开关消耗的估计功率超过预定阈值时，减少由诸如源极控制的场效应晶体管等开关消耗的功率的控制器。 降低开关消耗的功率可以防止由于过热而损坏开关。 控制器使用实际的漏极 - 源极电流和漏极电压数据确定开关耗散的功率的估计量。 在至少一个实施例中，控制器包括故障安全的估计功率耗散确定路径，当漏极电压数据失败可靠性测试时激活。 另外，在至少一个实施例中，控制器包括开关的热特性模型。 在至少一个实施例中，控制器利用开关和模型的实时估计的功率消耗来确定由开关消耗的估计功率何时超过功率耗散保护阈值。

公开(公告)号：US20150318844A1

公开(公告)日：2015-11-05

申请号：US14270296

申请日：2014-05-05

Applicant: Cirrus Logic, Inc.

Inventor： Dan Shen

IPC: H03K3/037

CPC classification number: H03K3/0377 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/2173 ,  H03K3/3565

Abstract: Voltage level shifting in a switching output stage is presented. The circuit may include a switching output stage configured to receive an analog input signal and provide a responsive digital output signal, the switching output stage having a first switching device coupled to a first supply voltage and a second switching device coupled to a second supply voltage, the first switching device and the second switching device being coupled to a common output node. The apparatus may also include a voltage level shifter circuit coupled to a switching control node of the second switching device, the voltage level shifter configured to shift a voltage level at the switching control node of the second switching device relative to the analog input signal, wherein the digital output signal at the common output node transitions as the input signal reaches a predetermined threshold value.

Abstract translation: 提出了开关输出级的电压电平转换。 电路可以包括开关输出级，其被配置为接收模拟输入信号并提供响应数字输出信号，开关输出级具有耦合到第一电源电压的第一开关器件和耦合到第二电源电压的第二开关器件， 第一开关装置和第二开关装置耦合到公共输出节点。 该装置还可以包括耦合到第二开关装置的开关控制节点的电压电平移位器电路，电压电平移位器被配置为相对于模拟输入信号移位第二开关装置的开关控制节点处的电压电平，其中 公共输出节点处的数字输出信号随着输入信号达到预定阈值而转变。