摘要:
In a semiconductor wafer substrate (20) for power semiconductor components (1) and in a method for producing the same, the semiconductor wafer substrate (20) has a large-area, buried rear side electrode (3) in form of a layer arranged between a self-supporting wafer substrate (4) and a non-self-supporting monocrystalline silicon wafer layer (5) arranged on the rear side electrode (3). The rear side electrode (3) has a ternary carbide and/or a ternary nitride and/or carbon.
摘要:
A semiconductor diode (30) has an anode (32), a cathode (33) and a semiconductor volume (31) provided between the anode (32) and the cathode (33). An electron mobility and/or hole mobility within a zone (34) of the semiconductor volume (31) that is situated in front of the cathode (33) is reduced relative to the rest of the semiconductor volume (31).
摘要:
A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of the substrate layer (4) and/or of the wiring structure has a ternary carbide and/or a ternary nitride and/or carbon.
摘要:
A power semiconductor device and a method for its production. The power semiconductor device has at least one power semiconductor chip, which has on its top side and on its back side large-area electrodes. The electrodes are electrically in connection with external contacts by means of connecting elements, the power semiconductor chip and the connecting elements being embedded in a plastic package. This plastic package has a number of layers of plastic, which are pressed one on top of the other and have plane-parallel upper sides. The connecting elements are arranged on at least one of the plane-parallel upper sides, between the layers of plastic pressed one on top of the other, as a patterned metal layer and are electrically in connection with the external contacts by means of contact vias through at least one of the layers of plastic.
摘要:
The invention relates to a power semiconductor component with increased robustness, in which a contact layer (13, 14) applied directly to a main surface (7, 11) of the semiconductor body (1) is composed of a metal (13) having a high melting point or of a thin aluminum layer (14), the layer thickness of which preferably lies between 1 and 5 nm. This contact layer is reinforced with a customary multilayer metallization system (15). The aluminum layer may, if appropriate, be patterned (14′).
摘要:
The invention relates to a method for production of deep p regions in silicon, with the method having the following step: bombardment of an n substrate section, an n epitaxial section or an exposed weakly doped n region of a semiconductor component that is to be produced with high-energy particles, whose energy is chosen such that the previous n region is redoped to form a p region to the desired depth after a specific healing time at a specific healing temperature after the bombardment, and to its use for the production of semiconductor components, for example in order to carry out isolating diffusion.
摘要:
A semiconductor component has a semiconductor body comprising a blocking pn junction, a source zone of a first conductivity type connected to a first electrode and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type connected to a second electrode. The side of the zone of the second conductivity type facing the drain zone forms a first surface, and in the region between the first surface and a second surface located between the first surface and the drain zone, comprises areas of the first and second conductivity type nested in one another. The second surface is positioned at a distance from the drain zone such that the areas of the first and second conductivity type nested in each other do not reach the drain zone.
摘要:
The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.
摘要:
A power semiconductor components has stop zones. In order to optimize the static and dynamic losses of the power semiconductor components, the stop zone is provided with donors which have at least one donor level which lies within the band gap of silicon and is at least 200 meV away from the conduction band edge of silicon.
摘要:
A semiconductor body includes a lightly doped semiconductor zone of a second conductivity type. A first oxide layer is produced on the semiconductor body. A structured polysilicon layer is produced on the oxide layer. The polysilicon layer acts as a mask so that the dopants of one conductivity type are implanted and driven into the surface of the semiconductor zone. A second oxide layer is then produced on the surface of the polysilicon layer and the semiconductor zone. A spacer is etched from this oxide layer. Dopants of the second conductivity type are implanted and driven into the surface of the semiconductor zone. A narrow resistor zone remains lying under the polysilicon layer.