BARRIER-OVERPASSING TRANSPORTER
    31.
    发明申请
    BARRIER-OVERPASSING TRANSPORTER 有权
    障碍物超载运输机

    公开(公告)号:US20080185795A1

    公开(公告)日:2008-08-07

    申请号:US12027576

    申请日:2008-02-07

    CPC classification number: A61G5/061 A61G5/046 A61G5/063 Y10S180/907

    Abstract: The present invention discloses a barrier-overpassing transporter, which comprises: a support frame carrying a rider or another load; a sensing/adjusting module detecting a tilting state of the support frame and maintaining the support frame in a horizontal state; a ground contact module arranged below the support frame supporting an effective load and lifting the support frame to overpass a surface of a barrier; and a wireless transceiver module collecting and transmitting information to enable adjustments and activities responding to interior states of the transporter. Thereby, the present invention can provide a safe, stable, reliable, comfortable, convenient and low-cost barrier-overpassing transporter.

    Abstract translation: 本发明公开了一种屏障超交运输机,其包括:承载骑手或另一负载的支撑框架; 感测/调节模块检测支撑框架的倾斜状态并将支撑框架保持在水平状态; 布置在所述支撑框架下方的支撑有效载荷并提升所述支撑框架的接地触头模块跨越屏障的表面; 以及无线收发器模块,其收集和发送信息以使得能够对所述运输者的内部状态进行调整和活动。 因此,本发明可以提供一种安全,稳定,可靠,舒适,方便和低成本的屏障超交运输机。

    Digital camera module package fabrication method
    32.
    发明授权
    Digital camera module package fabrication method 有权
    数码相机模块封装制造方法

    公开(公告)号:US07342215B2

    公开(公告)日:2008-03-11

    申请号:US11453454

    申请日:2006-06-14

    Abstract: A digital camera module package method includes the steps of: firstly, providing a carrier (30), which includes a base (24) and a leadframe (320). The base has a cavity therein and the leadframe includes a number of conductive pieces (322); Secondly, mounting an image sensor chip (34) on the base and received in the cavity, the image sensor having a photosensitive area. Thirdly, providing a plurality of wires (36), each electrically connecting the image sensor chip and a corresponding one of the conductive pieces of the carrier. Fourthly, applying an adhesive means (3262) around the image sensor chip that at least partially covers all the wires. Finally, mounting a transparent cover (38) on the carrier, where an adhesive means fixes the cover in place.

    Abstract translation: 数字照相机模块封装方法包括以下步骤:首先,提供一种包括基座(24)和引线框架(320)的载体(30)。 基座在其中具有空腔,引线框架包括多个导电片(322); 其次,将图像传感器芯片(34)安装在基座上并容纳在空腔中,图像传感器具有感光区域。 第三,提供多个电线(36),每个电线电连接图像传感器芯片和载体的相应导电片之一。 第四,在图像传感器芯片周围施加至少部分地覆盖所有电线的粘合装置(3262)。 最后,将透明盖(38)安装在载体上,其中粘合剂将盖固定到位。

    Multi-domain liquid crystal display
    33.
    发明申请
    Multi-domain liquid crystal display 有权
    多域液晶显示

    公开(公告)号:US20070182901A1

    公开(公告)日:2007-08-09

    申请号:US11604362

    申请日:2006-11-27

    Abstract: A multi-domain liquid crystal display includes a first and a second substrates, and a liquid crystal layer is interposed between the first and the second substrates. A first common electrode is formed on an entire surface of the first substrate. A first dielectric layer is formed on the second substrate and covers first signal lines, and a second dielectric layer is formed on the first dielectric layer and covers second signal lines. A plurality of pixel electrodes are formed on the second dielectric layer, and a plurality of second common electrodes are formed on the second substrate, where a voltage difference existing between the second common electrodes and the pixel electrode produces fringe fields.

    Abstract translation: 多域液晶显示器包括第一和第二基板,并且液晶层插入在第一和第二基板之间。 第一公共电极形成在第一基板的整个表面上。 第一介电层形成在第二基板上并覆盖第一信号线,第二电介质层形成在第一电介质层上并覆盖第二信号线。 在第二电介质层上形成多个像素电极,在第二基板上形成多个第二公共电极,第二公共电极和像素电极之间的电压差产生边缘场。

    Digital camera module packaging method
    34.
    发明申请
    Digital camera module packaging method 有权
    数码相机模块包装方式

    公开(公告)号:US20070126915A1

    公开(公告)日:2007-06-07

    申请号:US11595297

    申请日:2006-11-10

    CPC classification number: H04N5/2253 H04N5/2254

    Abstract: An image sensor chip package method includes the following steps: firstly, a plurality of shaped conductors are provided. Secondly, plastics are injected to partially enclose the conductors, thereby forming a base. Some of the conductors are exposed outside of the base. Thirdly, a ring-like middle portion is further formed on the base by means of injection. The base and the middle portion cooperatively form a space. Fourthly, an image sensor having a plurality of pads is disposed in the space. Fifthly, a number of bonding wires are provided to connect the pads and the conductors. Finally, a cover is secured to the top of the middle portion via an adhesive glue, thereby hermetically sealing the space and allowing light beams to pass therethrough.

    Abstract translation: 图像传感器芯片封装方法包括以下步骤:首先,多个“custom形导体。 其次,注射塑料以部分地包封导体,从而形成基底。 一些导体暴露在基部外部。 第三,通过注射在基座上进一步形成环状中间部分。 底座和中间部分协同地形成一个空间。 第四,具有多个焊盘的图像传感器设置在该空间中。 第五,提供多个接合线来连接焊盘和导体。 最后,通过胶粘剂将盖固定到中间部分的顶部,从而气密地密封空间并允许光束通过。

    Smart tag holder and cover housing
    37.
    发明申请
    Smart tag holder and cover housing 有权
    智能标签支架和盖子外壳

    公开(公告)号:US20050167492A1

    公开(公告)日:2005-08-04

    申请号:US10771489

    申请日:2004-02-03

    CPC classification number: G06K19/07758 G06K19/073 G06K19/07372

    Abstract: A smart-tag housing and method for securing a dedicated data card affixed to a SMIF-pod. A molded housing package for holding a data card for communication with a two-way receiver/transmitter mounted on a workstation, the smart-tag is a small battery operated microcomputer with an LCD for a two-way electromagnetic communications. The smart-tag housing includes a battery compartment, a battery compartment cover. A retaining plate is affixed to a side of the pod using double-sided adhesive tape. The smart-tag is demountably secured to the retaining plate with a slidable self locking plate. The self locking plate is unlocked with a key that is provided only to authorized personnel.

    Abstract translation: 一种用于固定固定在SMIF-pod上的专用数据卡的智能标签外壳和方法。 用于保持用于与安装在工作站上的双向接收器/发射器通信的数据卡的模制外壳封装,智能标签是具有用于双向电磁通信的LCD的小型电池操作微型计算机。 智能标签外壳包括电池仓,电池仓盖。 使用双面胶带将保持板固定在荚的一侧。 智能标签通过可滑动的自锁板可拆卸地固定在固定板上。 自锁板用仅提供给授权人员的钥匙解锁。

    Method for fabricating floating gate
    38.
    发明授权
    Method for fabricating floating gate 有权
    浮栅制造方法

    公开(公告)号:US06921694B2

    公开(公告)日:2005-07-26

    申请号:US10442308

    申请日:2003-05-19

    CPC classification number: H01L29/42324 H01L21/28273

    Abstract: A method for fabricating a floating gate with multiple tips. A semiconductor substrate is provided, on which an insulating layer and a patterned hard mask layer are sequentially formed. The patterned hard mask layer has an opening to expose the surface of the semiconductor substrate. A conducting layer is conformally formed on the patterned hard mask layer, and the opening is filled with the conducting layer. The conducting layer is planarized to expose the surface of the patterned hard mask layer. The conducting layer is thermally oxidized to form an oxide layer, and the patterned hard mask layer is removed.

    Abstract translation: 一种用于制造具有多个尖端的浮动栅极的方法。 提供半导体衬底,其上依次形成绝缘层和图案化的硬掩模层。 图案化的硬掩模层具有露出半导体衬底的表面的开口。 在图案化的硬掩模层上共形形成导电层,并且该开口填充有导电层。 导电层被平坦化以暴露图案化的硬掩模层的表面。 导电层被热氧化以形成氧化物层,去除图案化的硬掩模层。

    VERTICAL DRAM AND FABRICATION METHOD THEREOF
    39.
    发明申请
    VERTICAL DRAM AND FABRICATION METHOD THEREOF 有权
    垂直DRAM及其制造方法

    公开(公告)号:US20050127422A1

    公开(公告)日:2005-06-16

    申请号:US10707396

    申请日:2003-12-10

    Abstract: A vertical DRAM and fabrication method thereof. The vertical DRAM has a plurality of memory cells on a substrate, and each of the memory cells has a trench capacitor, a vertical transistor, and a source-isolation oxide layer in a deep trench. The main advantage of the present invention is to form an annular source diffusion and an annular drain diffusion of the vertical transistor around the sidewall of the deep trench. As a result, when a gate of the transistor is turned on, an annular gate channel is provided. The width of the gate channel of the present invention is therefore increased.

    Abstract translation: 垂直DRAM及其制造方法。 垂直DRAM在衬底上具有多个存储单元,并且每个存储单元在深沟槽中具有沟槽电容器,垂直晶体管和源极隔离氧化物层。 本发明的主要优点是在深沟槽的侧壁周围形成环形源极扩散和垂直晶体管的环形漏极扩散。 结果,当晶体管的栅极导通时,提供环形栅极沟道。 因此,本发明的栅极通道的宽度增加。

    Stack gate with tip vertical memory and method for fabricating the same
    40.
    发明授权
    Stack gate with tip vertical memory and method for fabricating the same 有权
    具有尖端垂直存储器的堆叠门及其制造方法

    公开(公告)号:US06870216B2

    公开(公告)日:2005-03-22

    申请号:US10606702

    申请日:2003-06-26

    CPC classification number: H01L27/11556 H01L27/115 H01L29/42336 H01L29/7881

    Abstract: A stacked gate vertical flash memory and a fabrication method thereof. The stacked gate vertical flash memory comprises a semiconductor substrate with a trench, a source conducting layer formed on the bottom of the trench, an insulating layer formed on the source conducting layer, a gate dielectric layer formed on a sidewall of the trench, a conducting spacer covering the gate dielectric layer as a floating gate, an inter-gate dielectric layer covering the conducting spacer, and a control gate conducting layer filled in the trench.

    Abstract translation: 堆叠式门垂直闪存及其制造方法。 层叠栅极垂直闪速存储器包括具有沟槽的半导体衬底,形成在沟槽底部的源极导电层,形成在源极导电层上的绝缘层,形成在沟槽侧壁上的栅极电介质层,导电层 覆盖作为浮动栅极的栅极介电层的隔板,覆盖导电间隔物的栅极间介电层和填充在沟槽中的控制栅极导电层。

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