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公开(公告)号：US20090297823A1
公开(公告)日：2009-12-03
申请号：US12541471
申请日：2009-08-14
IPC分类号： B32B3/26
CPC分类号： H01L21/31695 , H01L21/02126 , H01L21/02205 , H01L21/02216 , H01L21/02274 , H01L21/02277 , H01L21/02304 , H01L21/02351 , H01L21/3122 , H01L21/31633 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , Y10T428/249953 , Y10T428/249978 , H01L2924/00
摘要： The present invention provides a multiphase, ultra low k film which exhibits improved elastic modulus and hardness as well as various methods for forming the same. The multiphase, ultra low k dielectric film includes atoms of Si, C, O and H, has a dielectric constant of about 2.4 or less, nanosized pores or voids, an elastic modulus of about 5 or greater and a hardness of about 0.7 or greater. A preferred multiphase, ultra low k dielectric film includes atoms of Si, C, O and H, has a dielectric constant of about 2.2 or less, nanosized pores or voids, an elastic modulus of about 3 or greater and a hardness of about 0.3 or greater. The multiphase, ultra low k film is prepared by plasma enhanced chemical vapor deposition in which one of the following alternatives is utilized: at least one precursor gas comprising siloxane molecules containing at least three Si—O bonds; or at least one precursor gas comprising molecules containing reactive groups that are sensitive to e-beam radiation. Electronic structures including the multiphase, ultra low k film are also disclosed.
摘要翻译： 本发明提供了一种多相超低k膜，其具有改进的弹性模量和硬度以及其形成方法。 多相超低k电介质膜包括Si，C，O和H的原子，介电常数约为2.4或更小，纳米孔或空隙，弹性模量约5或更大，硬度约为0.7或更大 。 优选的多相超低k电介质膜包括Si，C，O和H的原子，具有约2.2或更小的介电常数，纳米孔或空隙，约3或更大的弹性模量和约0.3的硬度或 更大 多相超低k膜通过等离子体增强化学气相沉积制备，其中使用以下替代物之一：至少一种包含含有至少三个Si-O键的硅氧烷分子的前体气体; 或包含对电子束辐射敏感的含有反应性基团的分子的至少一种前体气体。 还公开了包括多相超低k膜的电子结构。
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32.发明申请ULTRA LOW k PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION PROCESSES USING A SINGLE BIFUNCTIONAL PRECURSOR CONTAINING BOTH A SiCOH MATRIX FUNCTIONALITY AND ORGANIC POROGEN FUNCTIONALITY 有权超低k等离子体增强化学气相沉积工艺使用单个双功能前体，包含SiCOH基质功能和有机多孔功能公开(公告)号：US20090146265A1
公开(公告)日：2009-06-11
申请号：US12371180
申请日：2009-02-13
IPC分类号： H01L23/58
CPC分类号： C23C16/401 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02337 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/3122 , H01L21/31633 , H01L21/31695 , Y10T428/249921
摘要： A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.
摘要翻译： 提供了由具有内置有机致孔剂的单一有机硅前体制备包含Si，C，O和H原子的SiCOH电介质材料的方法。 具有内置有机致孔剂的单一有机硅前体选自具有分子式SiRR1R2R3的硅烷（SiH4）衍生物，具有分子式为R4R5R6-Si-O-Si-R7R8R9的二硅氧烷衍生物和分子式为R10R11R12- Si-O-Si-R13R14-O-Si-R15R16R17其中R和R1-17可以相同也可以不相同，并且可以选自H，烷基，烷氧基，环氧基，苯基，乙烯基，烯丙基，烯基或炔基， 直链，支链，环状，多环，并且可以被含氧，含氮或氟的取代基官能化。 除了该方法之外，本申请还提供了由本发明方法制备的SiCOH电介质以及含有该SiCOH的电子结构。
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公开(公告)号：US07256146B2
公开(公告)日：2007-08-14
申请号：US11128493
申请日：2005-05-13
申请人： Stephan A. Cohen , Stephen McConnell Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
发明人： Stephan A. Cohen , Stephen McConnell Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
IPC分类号： H01L21/31
CPC分类号： H01L21/02282 , H01L21/02126 , H01L21/02222 , H01L21/3121 , H01L21/3122 , H01L21/3125 , H01L21/76807 , H01L21/76829 , H01L21/76832 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , Y10T428/31663 , H01L2924/00
摘要： The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1≦v≦0.9, 0≦w≦0.5, 0.01≦x≦0.9, 0≦y≦0.7, 0.01≦z≦0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1
摘要翻译： 本发明包括一种互连结构，其中包括在其间形成的金属，层间电介质和陶瓷扩散阻挡层，其中陶瓷扩散阻挡层具有组成为N 其中0.1 <= v <= 0.9,0 <= w <= 0.5,0.01 <= x <= 0.9， 对于v + w + x + y + z = 1，0 <= y <= 0.7,0.01 <= z <= 0.8。 陶瓷扩散阻挡层用作金属的扩散阻挡层，即铜。 本发明还包括用于形成本发明的陶瓷扩散阻挡层的方法，该方法包括沉积具有组合物的组合物的聚合物预陶瓷的步骤 其中0.1
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公开(公告)号：US06940173B2
公开(公告)日：2005-09-06
申请号：US10627794
申请日：2003-07-25
申请人： Stephan A. Cohen , Stephen McConnell Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
发明人： Stephan A. Cohen , Stephen McConnell Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
IPC分类号： H01L20060101 , H01L21/00 , H01L21/312 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/532
CPC分类号： H01L21/02282 , H01L21/02126 , H01L21/02222 , H01L21/3121 , H01L21/3122 , H01L21/3125 , H01L21/76807 , H01L21/76829 , H01L21/76832 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , Y10T428/31663 , H01L2924/00
摘要： The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1≦v≦0.9, 0≦w≦0.5, 0.01≦0.5, 0.01≦x≦0.9,0≦y≦0.7,0.01≦z≦0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1
摘要翻译： 本发明包括一种互连结构，其中包括在其间形成的金属，层间电介质和陶瓷扩散阻挡层，其中陶瓷扩散阻挡层具有组成为N 其中0.1 <= v <= 0.9,0 <= w <= 0.5,0.01 <= 0.5,0.01 对于v + w + x + y + z = 1，x <= 0.9,0 <= y <= 0.7,0.01 <= z <= 0.8。 陶瓷扩散阻挡层用作金属的扩散阻挡层，即铜。 本发明还包括用于形成本发明的陶瓷扩散阻挡层的方法，该方法包括沉积具有组合物的组合物的聚合物预陶瓷的步骤 其中0.1
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公开(公告)号：US06312793B1
公开(公告)日：2001-11-06
申请号：US09320495
申请日：1999-05-26
IPC分类号： B32B300
CPC分类号： H01L21/02126 , H01L21/02203 , H01L21/02211 , H01L21/02216 , H01L21/02274 , H01L21/312 , H01L21/3122 , H01L21/31633 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , Y10T428/249953 , Y10T428/249954 , Y10T428/249969 , Y10T428/249976 , Y10T428/249978 , Y10T428/249994 , H01L2924/00
摘要： A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.
摘要翻译： 公开了可用作IC芯片中的互连电介质的低介电常数多相材料。 还公开了利用等离子体增强化学气相沉积技术制造多相低介电常数膜的方法。 还公开了通过该方法制备的包含多相低介电常数材料的绝缘层的电子器件。
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公开(公告)号：US06203613B1
公开(公告)日：2001-03-20
申请号：US09421096
申请日：1999-10-19
IPC分类号： C30B2514
CPC分类号： H01L21/3141 , C30B25/02 , C30B29/68 , H01L21/02164 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02194 , H01L21/022 , H01L21/02205 , H01L21/0228 , H01L21/316 , H01L21/31608 , H01L21/31645 , H01L21/76843 , H01L21/76846
摘要： Metal nitrate-containing precursor compounds are employed in atomic layer deposition processes to form metal-containing films, e.g. metal, metal oxide, and metal nitride, which films exhibit an atomically abrupt interface and an excellent uniformity.
摘要翻译： 含金属硝酸盐的前体化合物用于原子层沉积工艺中以形成含金属的膜，例如 金属，金属氧化物和金属氮化物，这些膜表现出原子突变界面和优异的均匀性。
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37.发明授权Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same 失效具有超锐P-N结的半导体装置及其制造方法公开(公告)号：US06180444B2
公开(公告)日：2001-01-30
申请号：US09025710
申请日：1998-02-18
IPC分类号： H01L218234
CPC分类号： H01L29/66136 , H01L27/0814 , H01L29/861 , H01L29/868
摘要： A semiconductor device such as a P-N or P-I-N junction diode, includes a first semiconductor layer having a first conductivity-type and being mounted over a metal address line, and a second semiconductor layer having a second conductivity-type and being mounted over the first semiconductor material. The diode preferably has a thickness of substantially no more than about 1 micron, and the diode includes a P-N junction confined to a thickness of less than about 0.1 micron. In the preferred embodiment the method comprises depositing a first semiconductor layer having a first conductivity type, depositing a second intrinsic layer, annealing to convert both layers to a polycrystalline layer, implanting ions of a second conductivity type into the second layer, and annealing to convert the second layer to a polycrystalline. The result is a diode having an ultra-sharp p-n junction.
摘要翻译： 诸如PN或PIN结二极管的半导体器件包括具有第一导电类型并且安装在金属地址线上的第一半导体层，以及具有第二导电类型并安装在第一半导体上的第二半导体层 材料。 二极管优选具有基本上不超过约1微米的厚度，并且二极管包括限定在小于约0.1微米厚度的P-N结。 在优选实施例中，该方法包括沉积具有第一导电类型的第一半导体层，沉积第二本征层，退火以将两层转换成多晶层，将第二导电类型的离子注入到第二层中，以及退火以转换 第二层为多晶。 结果是具有超锋利p-n结的二极管。
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公开(公告)号：US5796121A
公开(公告)日：1998-08-18
申请号：US823844
申请日：1997-03-25
IPC分类号： H01L21/336 , H01L29/786 , H01L27/12
CPC分类号： H01L29/66765 , H01L29/78603
摘要： A thin film transistor is described incorporating a gate electrode, a gate insulating layer, a semiconducting channel layer deposited on top of the gate insulating layer, an insulating encapsulation layer positioned on the channel layer, a source electrode, a drain electrode and a contact layer beneath each of the source and drain electrodes and in contact with at least the channel layer, all of which are situated on a plastic substrate. By enabling the use of plastics having low glass transition temperatures as substrates, the thin film transistors may be used in large area electronics such as information displays and light sensitive arrays for imaging which are flexible, lighter in weight and more impact resistant than displays fabricated on traditional glass substrates. The thin film transistors are useful in active matrix liquid crystal displays where the plastic substrates are transparent in the visible spectrum. Enablement of the use of such plastics is by way of the use of polymeric encapsulation films to coat the surfaces of the plastic substrates prior to subsequent processing and the use of novel low temperature processes for the deposition of thin film transistor structures.
摘要翻译： 描述了一种薄膜晶体管，其结合了栅极电极，栅极绝缘层，沉积在栅极绝缘层顶部的半导体沟道层，位于沟道层上的绝缘封装层，源极，漏极和接触层 在每个源极和漏极电极下方并且与至少沟道层接触，所有这些都位于塑料衬底上。 通过使用具有低玻璃化转变温度的塑料作为基板，薄膜晶体管可以用于大面积电子设备中，例如用于成像的信息显示器和光敏阵列，其具有柔性，重量更轻，并且抗冲击性比制造在 传统玻璃基板。 薄膜晶体管可用于有源矩阵液晶显示器，其中塑料基板在可见光谱中是透明的。 使用这种塑料是通过使用聚合物封装膜在随后的处理之前涂覆塑料基板的表面，以及使用用于沉积薄膜晶体管结构的新颖的低温工艺。
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公开(公告)号：US5667586A
公开(公告)日：1997-09-16
申请号：US626115
申请日：1996-04-01
申请人： Bruce Allen Ek , Stephen McConnell Gates , Fernando Jose Guarin , Subramanian Srikanteswara Iyer , Adrian Roger Powell
发明人： Bruce Allen Ek , Stephen McConnell Gates , Fernando Jose Guarin , Subramanian Srikanteswara Iyer , Adrian Roger Powell
IPC分类号： H01L21/02 , H01L21/04 , H01L21/20 , H01L27/12 , H01L31/10 , H01L31/18 , H01L33/00 , H01S5/00 , H01S5/323 , C30B25/02
CPC分类号： H01L33/007 , H01L21/0445 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： A structure is fabricated comprising a substrate, a dielectric layer formed over the substrate, and a single crystal layer of a compound formed over the dielectric layer. The single crystal layer is formed by the chemical reaction of at least a first element with an initial single crystal layer of a second element on the dielectric layer having an initial thickness of about 100 to about 10,000 angstroms.According to another aspect, a carbide single crystal layer is provided on a substrate by depositing carbon from a solid carbon source at a low rate and low temperature, followed by reacting the carbon with the underlying layer to convert it to the carbide.
摘要翻译： 制造的结构包括衬底，在衬底上形成的电介质层和在电介质层上形成的化合物的单晶层。 单晶层通过至少第一元素与电介质层上初始厚度为约100至约10,000埃的第二元素的初始单晶层的化学反应形成。 根据另一方面，通过在低速率和低温下从固体碳源沉积碳，然后使碳与下层反应以将其转化为碳化物，在基板上提供碳化物单晶层。
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40.发明申请MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SiCOH DIELECTRICS 有权用于SiCOH电介质的无损伤双面加工的多层HARDMASK方案公开(公告)号：US20080311744A1
公开(公告)日：2008-12-18
申请号：US12198602
申请日：2008-08-26
IPC分类号： H01L21/768
CPC分类号： H01L21/0331 , H01L21/76811 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , Y10T428/12576 , Y10T428/12611 , Y10T428/31667 , H01L2924/00
摘要： Interconnect structures possessing an organosilicate glass based material for 90 nm and beyond BEOL technologies in which a multilayer hardmask using a line-first approach are described. The interconnect structure of the invention achieves respective improved device/interconnect performance and affords a substantial dual damascene process window owing to the non-exposure of the OSG material to resist removal plasmas and because of the alternating inorganic/organic multilayer hardmask stack. The latter feature implies that for every inorganic layer that is being etched during a specific etch step, the corresponding pattern transfer layer in the field is organic and vice-versa.
摘要翻译： 具有用于90nm以上的有机硅酸盐玻璃基材料的互连结构，其中描述了使用线路优先方法的多层硬掩模的BEOL技术。 本发明的互连结构实现了相应的改进的器件/互连性能，并且由于不暴露OSG材料以抵抗去除等离子体以及由于交替的无机/有机多层硬掩模堆叠而提供了实质的双镶嵌工艺窗口。 后一特征意味着对于在特定蚀刻步骤期间被蚀刻的每个无机层，该领域中相应的图案转移层是有机的，反之亦然。
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