公开(公告)号：US20170372960A1

公开(公告)日：2017-12-28

申请号：US15700631

申请日：2017-09-11

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Huixiong Dai ,  Yongmei Chen ,  He Ren ,  Mehul Naik

IPC: H01L21/768 ,  H01L21/3213 ,  H01L23/532

Abstract: A method of forming an interconnect structure for semiconductor or MEMS structures at a 10 nm Node (16 nm HPCD) down to 5 nm Node (7 nm HPCD), or lower, where the conductive contacts of the interconnect structure are fabricated using solely subtractive techniques applied to conformal layers of conductive materials.

公开(公告)号：US09748148B2

公开(公告)日：2017-08-29

申请号：US14736020

申请日：2015-06-10

Applicant: Applied Materials, Inc.

Inventor： Ellie Y. Yieh ,  Huixiong Dai ,  Srinivas D. Nemani ,  Ludovic Godet ,  Christopher Dennis Bencher

IPC: H01L21/66

CPC classification number: H01L22/12 ,  H01L22/20

Abstract: Embodiments of the disclosure provide apparatus and methods for localized stress modulation for overlay and edge placement error (EPE) using electron or ion implantation. In one embodiment, a process for correcting overlay error on a substrate generally includes performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion or an overlay error map, determining doping parameters to correct overlay error or substrate distortion based on the overlay error map, and providing a doping recipe to a doping apparatus based on the doping parameters determined to correct substrate distortion or overlay error. Embodiments may also provide performing a doping treatment process on the substrate using the determined doping repair recipe, for example, by comparing the overlay error map or substrate distortion with a database library stored in a computing system.

公开(公告)号：US11880137B2

公开(公告)日：2024-01-23

申请号：US18188676

申请日：2023-03-23

Applicant: Applied Materials, Inc.

Inventor： Huixiong Dai ,  Mangesh Ashok Bangar ,  Srinivas D. Nemani ,  Ellie Y. Yieh ,  Steven Hiloong Welch ,  Christopher S. Ngai

IPC: G03F7/09 ,  G03F7/20 ,  G03F7/16 ,  G03F7/11 ,  G03F7/004 ,  G03F7/039 ,  G03F7/40

CPC classification number: G03F7/094 ,  G03F7/0045 ,  G03F7/0392 ,  G03F7/11 ,  G03F7/168 ,  G03F7/203 ,  G03F7/2022 ,  G03F7/164 ,  G03F7/40

Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.

公开(公告)号：US11650506B2

公开(公告)日：2023-05-16

申请号：US16600101

申请日：2019-10-11

Applicant: Applied Materials, Inc.

Inventor： Huixiong Dai ,  Mangesh Bangar ,  Christopher S. Ngai ,  Srinivas D. Nemani ,  Ellie Y. Yieh ,  Steven Hiloong Welch

IPC: G03F7/11 ,  G03F7/20 ,  G03F7/09 ,  G03F7/16 ,  G03F7/40

CPC classification number: G03F7/2022 ,  G03F7/094 ,  G03F7/11 ,  G03F7/168 ,  G03F7/203 ,  G03F7/164 ,  G03F7/40

Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.

公开(公告)号：US10930555B2

公开(公告)日：2021-02-23

申请号：US16558702

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L21/033

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of overlapping masks in a three-color process.

公开(公告)号：US20200075408A1

公开(公告)日：2020-03-05

申请号：US16558702

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L21/768 ,  H01L21/033 ,  H01L23/522

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of overlapping masks in a three-color process.

公开(公告)号：US10234772B2

公开(公告)日：2019-03-19

申请号：US15829809

申请日：2017-12-01

Applicant: APPLIED MATERIALS, INC.

Inventor： Mangesh Bangar ,  Bruce E. Adams ,  Kelly E. Hollar ,  Abhilash J. Mayur ,  Huixiong Dai ,  Jaujiun Chen

IPC: G03B27/68 ,  G03F7/20

Abstract: A calibration curve for a wafer comprising a layer on a substrate is determined. The calibration curve represents a local parameter change as a function of a treatment parameter associated with a wafer exposure to a light. The local parameter of the wafer is measured. An overlay error is determined based on the local parameter of the wafer. A treatment map is computed based on the calibration curve to correct the overlay error for the wafer. The treatment map represents the treatment parameter as a function of a location on the wafer.

公开(公告)号：US09864280B2

公开(公告)日：2018-01-09

申请号：US14874353

申请日：2015-10-02

Applicant: Applied Materials Inc.

Inventor： Mangesh Bangar ,  Bruce E. Adams ,  Kelly E. Hollar ,  Abhilash J Mayur ,  Huixiong Dai ,  Jaujiun Chen

IPC: G06F7/20 ,  G03F9/00 ,  G03F7/20

CPC classification number: G03F7/70633

Abstract: A calibration curve for a wafer comprising a layer on a substrate is determined. The calibration curve represents a local parameter change as a function of a treatment parameter associated with a wafer exposure to a light. The local parameter of the wafer is measured. An overlay error is determined based on the local parameter of the wafer. A treatment map is computed based on the calibration curve to correct the overlay error for the wafer. The treatment map represents the treatment parameter as a function of a location on the wafer.

公开(公告)号：US09815091B2

公开(公告)日：2017-11-14

申请号：US14476398

申请日：2014-09-03

Applicant: Applied Materials, Inc.

Inventor： Christopher S. Ngai ,  Huixiong Dai ,  Ludovic Godet ,  Ellie Y. Yieh

IPC: B08B7/00 ,  B08B1/00 ,  H01L21/46 ,  H01L21/687 ,  H01L21/67 ,  H01L21/683 ,  B08B6/00

CPC classification number: B08B1/001 ,  B08B1/00 ,  B08B1/008 ,  B08B6/00 ,  B08B7/0028 ,  H01L21/67028 ,  H01L21/67253 ,  H01L21/6831 ,  H01L21/68742

Abstract: Particulate cleaning assemblies and methods for cleaning are disclosed. In one example, a device for removing particles from a backside surface of a substrate is described. The device includes a chamber body with a substrate chucking device, a particulate cleaning article positioned over the substrate supporting surface, an optical sensing device positioned under the particulate cleaning article and a substrate positioning device separates the particulate cleaning article and a substrate. In another example, a method for removing particles from a substrate is disclosed. The method includes positioning a substrate with a processing surface and a supporting surface in a process chamber. At least a portion of the substrate can be chucked to a substrate chucking device, the substrate chucking device having a substrate supporting surface with a particulate cleaning article positioned thereon. The substrate is then separated from the particulate cleaning article leaving particles behind.

公开(公告)号：US09716012B2

公开(公告)日：2017-07-25

申请号：US14560525

申请日：2014-12-04

Applicant: Applied Materials, Inc.

Inventor： David Thompson ,  Huixiong Dai ,  Patrick M. Martin ,  Timothy Michaelson ,  Kadthala R. Narendrnath ,  Robert Jan Visser ,  Jingjing Xu ,  Lin Zhang

IPC: H01L21/3205 ,  C23C16/04 ,  C23C16/18 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/32051 ,  C23C16/04 ,  C23C16/18 ,  C23C16/45551 ,  C23C16/45553 ,  H01L21/28562 ,  H01L21/76849

Abstract: Provided are methods for selective deposition. Certain methods describe providing a first substrate surface; providing a second substrate surface; depositing a first layer of film over the first and second substrate surfaces, wherein the deposition has an incubation delay over the second substrate surface such that the first layer of film over the first substrate surface is thicker than the first layer of film deposited over the second substrate surface; and etching the first layer of film over the first and second substrate surfaces, wherein the first layer of film over the second substrate surface is at least substantially removed, but the first layer of film over the first substrate is only partially removed.