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    PATTERN DENSITY CONTROL USING EDGE PRINTING PROCESSES
    34.
    发明申请
    PATTERN DENSITY CONTROL USING EDGE PRINTING PROCESSES 有权
    使用边缘印刷工艺的图案密度控制

    公开(公告)号：US20070105319A1

    公开(公告)日：2007-05-10

    申请号：US11163968

    申请日：2005-11-04

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66545 ,  H01L27/1052 ,  Y10S438/95

    摘要： A structure fabrication method. The method comprises providing a design structure that includes (i) a design substrate and (ii) M design normal regions on the design substrate, wherein M is a positive integer greater than 1. Next, N design sacrificial regions are added between two adjacent design normal regions of the M design normal regions, wherein N is a positive integer. Next, an actual structure is provided that includes (i) an actual substrate corresponding to the design substrate, (ii) a to-be-etched layer on the actual substrate, and (iii) a memory layer on the to-be-etched layer. Next, an edge printing process is performed on the memory layer so as to form (a) M normal memory portions aligned with the M design normal regions and (b) N sacrificial memory portions aligned with the N design sacrificial regions.

    摘要翻译： 一种结构制造方法。 该方法包括提供一种设计结构，其包括（i）设计基板和（ii）设计基板上的M设计法线区域，其中M是大于1的正整数。接下来，在两个相邻设计之间添加N个设计牺牲区域 M正常区域的正常区域，其中N是正整数。 接下来，提供实际结构，其包括（i）与设计基板相对应的实际基板，（ii）实际基板上的待蚀刻层，以及（iii）待蚀刻的存储层 层。 接下来，对存储层执行边缘打印处理，以便形成（a）与M设计法线区域对准的M个正常存储器部分和（b）与N个设计牺牲区域对准的N个牺牲存储器部分。

    SIDEWALL IMAGE TRANSFER (SIT) TECHNOLOGIES
    36.
    发明申请
    SIDEWALL IMAGE TRANSFER (SIT) TECHNOLOGIES 失效
    SIDEWALL图像传输（SIT）技术

    公开(公告)号：US20070066009A1

    公开(公告)日：2007-03-22

    申请号：US11162662

    申请日：2005-09-19

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Kirk Peterson

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Kirk Peterson

    IPC分类号： H01L21/8242 ,  H01L21/336

    CPC分类号： H01L21/32139 ,  H01L21/0337 ,  H01L21/28132

    摘要： A structure fabrication method. The method comprises providing a structure which comprises (a) a to-be-etched layer, (b) a memory region, (c) a positioning region, (d) and a capping region on top of one another. Then, the positioning region is indented. Then, a conformal protective layer is formed on exposed-to-ambient surfaces of the structure. Then, portions of the conformal protective layer are removed so as to expose the capping region to the surrounding ambient without exposing the memory region to the surrounding ambient. Then, the capping region is removed so as to expose the positioning region to the surrounding ambient. Then, the positioning region is removed so as to expose the memory region to the surrounding ambient. Then, the memory region is directionally etched with remaining portions of the conformal protection layer serving as a blocking mask.

    摘要翻译： 一种结构制造方法。 该方法包括提供一种结构，该结构包括：（a）待蚀刻层，（b）存储区域，（c）位于彼此顶部的定位区域（d）和封盖区域。 然后，定位区域缩进。 然后，在结构的暴露于环境的表面上形成保形层。 然后，去除保形层的一部分，以将覆盖区域暴露于周围环境，而不会使存储区域暴露于周围环境。 然后，去除封盖区域，以将定位区域暴露于周围环境。 然后，移除定位区域，以将存储区域暴露于周围环境。 然后，存储区域被定向蚀刻，保形层的剩余部分用作阻挡掩模。

    CARBON NANOTUBES AS LOW VOLTAGE FIELD EMISSION SOURCES FOR PARTICLE PRECIPITATORS
    37.
    发明申请
    CARBON NANOTUBES AS LOW VOLTAGE FIELD EMISSION SOURCES FOR PARTICLE PRECIPITATORS 失效
    碳纳米管作为颗粒预处理器的低电压场发射源

    公开(公告)号：US20070051237A1

    公开(公告)日：2007-03-08

    申请号：US11161220

    申请日：2005-07-27

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    IPC分类号： B03C3/41 ,  B03C3/60

    CPC分类号： B03C3/41 ,  B03C3/60 ,  B03C2201/10 ,  Y10S977/742

    摘要： An air particle precipitator and a method of air filtration comprise a housing unit; a first conductor in the housing unit; a second conductor in the housing unit; and a carbon nanotube grown on the second conductor. Preferably, the first conductor is positioned opposite to the second conductor. The air particle precipitator further comprises an electric field source adapted to apply an electric field to the housing unit. Moreover, the carbon nanotube is adapted to ionize gas in the housing unit, wherein the ionized gas charges gas particulates located in the housing unit, and wherein the first conductor is adapted to trap the charged gas particulates. The air particle precipitator may further comprise a metal layer over the carbon nanotube.

    摘要翻译： 空气颗粒除尘器和空气过滤方法包括壳体单元; 住房单元中的第一个导体; 壳体单元中的第二导体; 和在第二导体上生长的碳纳米管。 优选地，第一导体与第二导体相对定位。 空气粒子除尘器还包括适于向壳体单元施加电场的电场源。 此外，碳纳米管适于使壳体单元中的气体电离，其中电离气体对位于壳体单元中的气体微粒进行充电，并且其中第一导体适于捕集带电气体微粒。 空气颗粒除尘器还可以包括在碳纳米管上的金属层。

    Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers
    38.
    发明申请
    Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers 有权
    集成电路芯片利用定向碳纳米管导电层

    公开(公告)号：US20070048879A1

    公开(公告)日：2007-03-01

    申请号：US11552771

    申请日：2006-10-25

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Peter Mitchell

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Peter Mitchell

    IPC分类号： H01L21/00

    CPC分类号： H01L21/7685 ,  B82Y10/00 ,  H01L21/32051 ,  H01L21/76838 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/53276 ,  H01L51/0048 ,  H01L51/0052 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/778 ,  Y10S977/842 ,  H01L2924/00

    摘要： A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least one sublayer of oriented carbon nanotubes. The conductive layer sandwich preferably contains two sublayers of carbon nanotubes, in which the carbon nanotube orientation in one sublayer is substantially perpendicular to that of the other layer. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal. In one embodiment, oriented carbon nanotubes are created by forming a series of parallel surface ridges, covering the top and one side of the ridges with a catalyst inhibitor, and growing carbon nanotubes horizontally from the uncovered vertical sides of the ridges. In another embodiment, oriented carbon nanotubes are grown on the surface of a conductive material in the presence of a directional flow of reactant gases and a catalyst.

    摘要翻译： 集成电路中的导电层形成为具有多个子层的夹层，包括至少一个定向碳纳米管子层。 导电层夹层优选含有碳纳米管的两个子层，其中一个子层中的碳纳米管取向基本上垂直于另一层的碳纳米管取向。 导电层夹层优选地包含一种或多种另外的导电材料的子层，例如金属。 在一个实施方案中，通过形成一系列平行的表面脊，通过用催化剂抑制剂覆盖脊的顶部和一侧并从脊的未被覆盖的垂直侧水平生长碳纳米管来产生定向碳纳米管。 在另一个实施方案中，在反应物气体和催化剂的定向流的存在下，在导电材料的表面上生长取向的碳纳米管。

    METHOD FOR FABRICATING OXYGEN-IMPLANTED SILICON ON INSULATION TYPE SEMICONDUCTOR AND SEMICONDUCTOR FORMED THEREFROM
    39.
    发明申请
    METHOD FOR FABRICATING OXYGEN-IMPLANTED SILICON ON INSULATION TYPE SEMICONDUCTOR AND SEMICONDUCTOR FORMED THEREFROM 失效
    在绝缘型半导体上制造氧化硅的方法及其形成的半导体

    公开(公告)号：US20060226480A1

    公开(公告)日：2006-10-12

    申请号：US10907565

    申请日：2005-04-06

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Larry Nesbit

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Larry Nesbit

    IPC分类号： H01L27/12 ,  H01L21/76

    CPC分类号： H01L21/76267 ,  H01L21/76243 ,  H01L21/76281 ,  H01L21/76283

    摘要： The invention relates generally to a method for fabricating oxygen-implanted semiconductors, and more particularly to a method for fabricating oxygen-implanted silicon-on-insulation (“SOI”) type semiconductors by cutting-up regions into device-sized pieces prior to the SOI-oxidation process. The process sequence to make SOI is modified so that the implant dose may be reduced and relatively long and high temperature annealing process steps may be shortened or eliminated. This simplification may be achieved if, after oxygen implant, the wafer structure is sent to pad formation, and masking and etching. After the etching, annealing or oxidation process steps may be performed to create the SOI wafer.

    摘要翻译： 本发明一般涉及一种用于制造氧注入半导体的方法，更具体地说，涉及一种用于将氧注入的硅绝缘（“SOI”）型半导体通过切割区域制造成器件尺寸的片之前的方法 SOI氧化工艺。 制造SOI的工艺顺序被修改，使得可以减少注入剂量并且相对较长并且可以缩短或消除高温退火工艺步骤。 如果在氧注入之后将晶片结构发送到焊盘形成以及掩模和蚀刻，则可以实现这种简化。 在蚀刻之后，可以执行退火或氧化工艺步骤以产生SOI晶片。

    IMPLANTATION OF GATE REGIONS IN SEMICONDUCTOR DEVICE FABRICATION
    40.
    发明申请
    IMPLANTATION OF GATE REGIONS IN SEMICONDUCTOR DEVICE FABRICATION 失效
    在半导体器件制造中的栅极区域的植入

    公开(公告)号：US20060172547A1

    公开(公告)日：2006-08-03

    申请号：US10905977

    申请日：2005-01-28

    申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger

    IPC分类号： H01L21/302 ,  H01L21/336 ,  H01L21/8234

    CPC分类号： H01L29/66545 ,  H01L21/0273 ,  H01L21/266 ,  H01L21/28035 ,  H01L29/1083 ,  H01L29/6653 ,  H01L29/6659

    摘要： A method for implanting gate regions essentially without implanting regions of the semiconductor layer where source/drain regions will be later formed. The method includes the steps of (a) providing (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, (iii) a gate region on the gate dielectric layer, wherein the gate region is electrically insulated from the semiconductor layer by the gate dielectric layer; (b) forming a resist layer on the gate dielectric layer and the gate region; (c) removing a cap portion of the resist layer essentially directly above the gate region essentially without removing the remainder of the resist layer; and (d) implanting the gate region essentially without implanting the semiconductor layer.

    摘要翻译： 一种注入栅极区域的方法，其基本上不注入将在其后形成源极/漏极区域的半导体层的区域。 该方法包括以下步骤：（i）在半导体层上提供（i）半导体层，（ii）栅极电介质层，（iii）栅极介电层上的栅极区域，其中栅极区域与 半导体层由栅介质层; （b）在栅介质层和栅极区上形成抗蚀剂层; （c）基本上直接在栅极区域上方去除抗蚀剂层的盖部分，而不去除抗蚀剂层的其余部分; 和（d）基本上不注入半导体层来注入栅极区域。