FORKSHEET TRANSISTOR ARCHITECTURES
    36.
    发明申请

    公开(公告)号:US20220102346A1

    公开(公告)日:2022-03-31

    申请号:US17547147

    申请日:2021-12-09

    Abstract: Embodiments disclosed herein include a semiconductor device. In an embodiment, the semiconductor device comprises a first transistor strata. The first transistor strata comprises a first backbone, a first transistor adjacent to a first edge of the first backbone, and a second transistor adjacent to a second edge of the first backbone. In an embodiment, the semiconductor device further comprises a second transistor strata over the first transistor strata. The second transistor strata comprises a second backbone, a third transistor adjacent to a first edge of the second backbone, and a fourth transistor adjacent to a second edge of the second backbone.

    WRAP-AROUND CONTACT STRUCTURES FOR SEMICONDUCTOR NANOWIRES AND NANORIBBONS

    公开(公告)号:US20200219997A1

    公开(公告)日:2020-07-09

    申请号:US16238978

    申请日:2019-01-03

    Abstract: Wrap-around contact structures for semiconductor nanowires and nanoribbons, and methods of fabricating wrap-around contact structures for semiconductor nanowires and nanoribbons, are described. In an example, an integrated circuit structure includes a semiconductor nanowire above a first portion of a semiconductor sub-fin. A gate structure surrounds a channel portion of the semiconductor nanowire. A source or drain region is at a first side of the gate structure, the source or drain region including an epitaxial structure on a second portion of the semiconductor sub-fin, the epitaxial structure having substantially vertical sidewalls in alignment with the second portion of the semiconductor sub-fin. A conductive contact structure is along sidewalls of the second portion of the semiconductor sub-fin and along the substantially vertical sidewalls of the epitaxial structure.

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