Thin film transistor structure
    31.
    发明授权
    Thin film transistor structure 有权
    薄膜晶体管结构

    公开(公告)号:US07795683B2

    公开(公告)日:2010-09-14

    申请号:US11561898

    申请日:2006-11-21

    Abstract: A structure of a thin film transistor and a method for making the same are provided. The structure includes a strip-shaped silicon island, a gate, and a first and second ion doping regions. The strip-shaped silicon island is a thin film region with a predetermined long side and short side, and farther has a plurality of lateral grain boundaries substantially parallel to the short side of the silicon island. The gate is located over the silicon island and substantially parallel to the lateral grain boundaries. The first and second ion doping regions, used as source/drain regions of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate.

    Abstract translation: 提供薄膜晶体管的结构及其制造方法。 该结构包括条形硅岛,栅极以及第一和第二离子掺杂区域。 带状硅岛是具有预定的长边和短边的薄膜区域,并且还具有基本上平行于硅岛短边的多个横向晶界。 栅极位于硅岛上方并且基本上平行于横向晶界。 用作TFT的源极/漏极区域的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。

    Method of forming microcrystalline silicon film
    32.
    发明申请
    Method of forming microcrystalline silicon film 审中-公开
    形成微晶硅膜的方法

    公开(公告)号:US20080188062A1

    公开(公告)日:2008-08-07

    申请号:US11701762

    申请日:2007-02-02

    Abstract: A method capable of making a semiconductor device in a plasma-assisted chemical vapor deposition (CVD) system including a chamber having a first electrode and a second electrode spaced apart from one another, the method comprising providing a substrate on the second electrode, the substrate including a surface being exposed to the first electrode, forming a semiconductor film on the surface of the substrate and applying a first bias to the second electrode during a nucleation stage of the semiconductor film till a predetermined thickness of the semiconductor film is reached, and applying a second bias to the second electrode after the predetermined thickness of the semiconductor film is reached.

    Abstract translation: 一种能够制造等离子体辅助化学气相沉积(CVD)系统中的半导体器件的方法,其包括具有彼此间隔开的第一电极和第二电极的腔室,所述方法包括在所述第二电极上提供衬底,所述衬底 包括暴露于所述第一电极的表面,在所述基板的表面上形成半导体膜,并且在所述半导体膜的成核阶段期间向所述第二电极施加第一偏压,直到达到所述半导体膜的预定厚度,并施加 在半导体膜的预定厚度达到之后,向第二电极施加第二偏压。

    Method of forming poly-silicon thin film transistors
    33.
    发明授权
    Method of forming poly-silicon thin film transistors 有权
    形成多晶硅薄膜晶体管的方法

    公开(公告)号:US07361566B2

    公开(公告)日:2008-04-22

    申请号:US11479895

    申请日:2006-06-30

    CPC classification number: H01L29/66757 H01L29/4908 H01L29/66765

    Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

    Abstract translation: 描述形成多晶硅薄膜晶体管的方法。 在基板上形成非晶硅薄膜晶体管,然后使用红外(IR)加热工艺。 栅极金属和源极/漏极金属被快速加热,并将热能传导到非晶硅层。 接下来,在非晶硅层中发生结晶以形成多晶硅。 因此,制造多晶硅薄膜晶体管。

    Active organic light emitting diode display structure
    34.
    发明授权
    Active organic light emitting diode display structure 有权
    主动有机发光二极管显示结构

    公开(公告)号:US07215073B2

    公开(公告)日:2007-05-08

    申请号:US10673324

    申请日:2003-09-30

    CPC classification number: H01L27/322 H01L27/3244 H01L27/3246 H01L51/5284

    Abstract: The present invention discloses an active organic light emitting diode (AOLED) display structure. A color filter and thin film transistor organic light emitting diode (TFT-OLED) are incorporated on one substrate of the AOLED. Moreover, a Indium Tin Oxide(ITO)layer of the AOLED is deposited with a black matrix layer so as to lower light leakage effect and increase the contrast and color purity level in between pixels of the display. By adopting such technology, a flat panel display having large area, high resolution and low product cost is accordingly implemented.

    Abstract translation: 本发明公开了一种有源有机发光二极管(AOLED)显示结构。 滤色器和薄膜晶体管有机发光二极管(TFT-OLED)结合在AOLED的一个基板上。 此外,AOLED的氧化铟锡(ITO)层沉积有黑矩阵层,以便降低漏光效应并增加显示器的像素之间的对比度和色纯度水平。 通过采用这种技术,可以实现面积大,分辨率高,产品成本低的平板显示器。

    Method of forming poly-silicon thin film transistors
    35.
    发明授权
    Method of forming poly-silicon thin film transistors 有权
    形成多晶硅薄膜晶体管的方法

    公开(公告)号:US07094656B2

    公开(公告)日:2006-08-22

    申请号:US10733721

    申请日:2003-12-11

    CPC classification number: H01L29/66757 H01L29/4908 H01L29/66765

    Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

    Abstract translation: 描述形成多晶硅薄膜晶体管的方法。 在基板上形成非晶硅薄膜晶体管,然后使用红外(IR)加热工艺。 栅极金属和源极/漏极金属被快速加热,并将热能传导到非晶硅层。 接下来,在非晶硅层中发生结晶以形成多晶硅。 因此,制造多晶硅薄膜晶体管。

    Multi-layered complementary wire structure and manufacturing method thereof
    36.
    发明申请
    Multi-layered complementary wire structure and manufacturing method thereof 有权
    多层互补线结构及其制造方法

    公开(公告)号:US20050253249A1

    公开(公告)日:2005-11-17

    申请号:US11131084

    申请日:2005-05-17

    Abstract: A multi-layered wire structure includes a substrate, a plurality of first conductive lines formed in a first layer over the substrate extending in parallel to each other in a first direction, a plurality of second conductive lines formed in a second layer over the first layer extending in parallel to each other in a second direction orthogonal to the first direction, a plurality of sets of third conductive lines formed in the second layer extending in the first direction, each set of third conductive lines corresponding to one of the first conductive lines, and a plurality of sets of conductive paths formed between the first layer and the second layer, each set of conductive paths corresponding to one of the first conductive lines and one set of third conductive lines and electrically connecting the corresponding first conductive line to the corresponding set of third conductive lines.

    Abstract translation: 一种多层导线结构,包括:基板,形成在第一层上的多个第一导电线,该第一导电线在基板上沿着第一方向彼此平行地延伸;多个第二导电线,形成在第一层上的第一层 在与第一方向正交的第二方向上彼此平行地延伸的多个第三导线组,所述第二导电线形成在第一方向上延伸,每组第三导线对应于第一导线之一, 以及形成在所述第一层和所述第二层之间的多组导电路径,每组导电路径对应于所述第一导电线中的一条和一组第三导电线,并将相应的第一导电线电连接到相应的集合 的第三导线。

    Method for manufacturing a flexible panel for a flat panel display
    37.
    发明申请
    Method for manufacturing a flexible panel for a flat panel display 有权
    制造平板显示器用柔性面板的方法

    公开(公告)号:US20050095945A1

    公开(公告)日:2005-05-05

    申请号:US10695810

    申请日:2003-10-30

    CPC classification number: G02F1/133305

    Abstract: A method for manufacturing a flexible panel is disclosed, which has the following steps. First, a first substrate having a plurality of functional switches or conducting lines thereon is provided. Then, a second substrate is bonded on the functional switches or conducting lines, and the first substrate is thinned to a predetermined thickness subsequently. Afterwards, a flexible third substrate is adhered on the first substrate, wherein the first substrate is sandwiched between the second substrate and the third substrate. Finally, the second substrate is removed.

    Abstract translation: 公开了一种制造柔性面板的方法,其具有以下步骤。 首先,提供具有多个功能开关或导线的第一基板。 然后,第二基板被接合在功能开关或导线上,并且第一基板随后变薄到预定厚度。 之后,将柔性第三基板粘附在第一基板上,其中第一基板夹在第二基板和第三基板之间。 最后,去除第二衬底。

    Digital programmable direct current to direct current (DC-DC) voltage-down converter
    38.
    发明授权
    Digital programmable direct current to direct current (DC-DC) voltage-down converter 失效
    数字可编程直流直流直流(DC-DC)降压转换器

    公开(公告)号:US06181123B2

    公开(公告)日:2001-01-30

    申请号:US09267879

    申请日:1999-03-11

    CPC classification number: H02M3/157

    Abstract: A digital programmable DC—DC voltage-down converter which can be used in a low voltage and low power digital circuit design is disclosed. The DC—DC voltage-down converter includes at least a digitally controlled oscillator (DCO), a pulse-width modulator (PWM), a gate driver, and a switching-type voltage-down converter. Duty cycle and operating frequency of the modulated signal are controlled by using two digital control signals. Furthermore, combining the pulse-width modulator and the digitally controlled oscillator (DCO), the duty cycle of the generated clock is more robustly stable for different frequencies during process variation.

    Abstract translation: 公开了可用于低电压和低功率数字电路设计的数字可编程DC-DC降压转换器。 DC-DC降压转换器至少包括数字控制振荡器(DCO),脉冲宽度调制器(PWM),栅极驱动器和开关型降压转换器。 通过使用两个数字控制信号来控制调制信号的占空比和工作频率。 此外,组合脉冲宽度调制器和数字控制振荡器(DCO)时,生成的时钟的占空比在过程变化期间对于不同的频率更稳健。

    Multi-layered complementary conductive line structure
    39.
    发明授权
    Multi-layered complementary conductive line structure 有权
    多层互补导线结构

    公开(公告)号:US07960731B2

    公开(公告)日:2011-06-14

    申请号:US11870426

    申请日:2007-10-11

    CPC classification number: H01L27/1288 G02F1/1368 H01L27/124

    Abstract: A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.

    Abstract translation: 提供多层互补导电线结构,其制造方法和TFT(薄膜晶体管)显示阵列的制造方法。 具有多层互补导电线结构的TFT的工艺与当前工艺相比不需要增加掩模数,并且能够解决显示器内部的线的电阻问题。

    FABRICATION PROCESS OF MEMORY CELL
    40.
    发明申请
    FABRICATION PROCESS OF MEMORY CELL 有权
    记忆细胞的制造过程

    公开(公告)号:US20080108195A1

    公开(公告)日:2008-05-08

    申请号:US11963854

    申请日:2007-12-24

    Abstract: A memory cell suitable for being disposed over a substrate is provided. The memory cell includes a poly-silicon island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-silicon island is disposed on the substrate and includes a source region, a drain region and a channel region located between the source and drain regions. The channel region has a plurality of regularly arranged tips thereon. The first dielectric layer is disposed on the poly-silicon island. The trapping layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the trapping layer. The control gate is disposed on the second dielectric layer. The memory cell mentioned above can be integrated into the LTPS-LCD panel or OLED panel.

    Abstract translation: 提供了适于布置在基板上的存储单元。 存储单元包括多晶硅岛,第一介电层,俘获层,第二介质层和控制栅极。 多硅岛设置在衬底上,并且包括源极区,漏极区和位于源极和漏极区之间的沟道区。 通道区域在其上具有多个规则排列的尖端。 第一介电层设置在多晶硅岛上。 捕获层设置在第一介电层上。 第二介质层设置在捕获层上。 控制栅极设置在第二电介质层上。 上述存储单元可以集成到LTPS-LCD面板或OLED面板中。

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