公开(公告)号：US20050253614A1

公开(公告)日：2005-11-17

申请号：US10937401

申请日：2004-09-10

申请人： Shigeyuki Maruyama ,  Toru Nishino

发明人： Shigeyuki Maruyama ,  Toru Nishino

IPC分类号： G01R31/26 ,  G01R1/073 ,  G01R31/02 ,  G01R31/28 ,  H01R33/76

CPC分类号： G01R31/2875 ,  G01R1/0735

摘要： An electrical connecting method has the step of bringing a contact member connected to an electric circuit into contact with a terminal of an electronic part. A desired processing is performed by feeding current to the terminal via the contact member. The contact member is then separated from the terminal. When the contact member is brought into contact with the terminal, energy is applied to the contact member or the terminal in order to locally soften a portion of the terminal contacting the contact member. Thereafter, the desired processing is performed, in the state that the contacting portion of the terminal with the contact member is softened so as to reduce the contact resistance and so as to increase the subsequent separatability of the contact member from the terminal.

摘要翻译： 电连接方法具有使与电路连接的接触构件与电子部件的端子接触的步骤。 通过经由接触构件向端子馈送电流来执行所需的处理。 然后将接触构件与端子分离。 当接触构件与端子接触时，能量被施加到接触构件或端子，以便局部软化接触接触构件的端子的一部分。 此后，在端子与接触构件的接触部分被软化以便降低接触电阻并且增加接触构件与端子的随后的分离性的状态下进行所需的处理。

公开(公告)号：US06927343B2

公开(公告)日：2005-08-09

申请号：US10266866

申请日：2002-10-09

申请人： Naoyuki Watanabe ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Daisuke Koizumi ,  Takafumi Hashitani

发明人： Naoyuki Watanabe ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Daisuke Koizumi ,  Takafumi Hashitani

IPC分类号： G01R1/06 ,  G01R1/073 ,  H01L21/66 ,  H01R13/24 ,  H05K1/00

CPC分类号： G01R1/07314 ,  G01R1/06716 ,  H01R12/52 ,  H01R12/714 ,  H01R13/24

摘要： A contactor has a film substrate of an insulating material and plural wiring patterns on the substrate. A first end of each wiring pattern extends out from a first edge of the substrate as a first contact terminal and a second end of each wiring pattern extends out from a second edge of the substrate as a second contact terminal, and a part of the contactor located between the first end and second end can be deformed resiliently.

摘要翻译： 接触器具有绝缘材料的薄膜基板和基板上的多个布线图案。 每个布线图案的第一端作为第一接触端子从基板的第一边缘延伸出来，并且每个布线图案的第二端作为第二接触端子从基板的第二边缘延伸出来，并且接触器的一部分 位于第一端部和第二端部之间的弹性体可以弹性变形。

公开(公告)号：US08766659B2

公开(公告)日：2014-07-01

申请号：US13033796

申请日：2011-02-24

申请人： Shigeyuki Maruyama ,  Yoshihiro Sekizawa ,  Tomohiro Suzuka

发明人： Shigeyuki Maruyama ,  Yoshihiro Sekizawa ,  Tomohiro Suzuka

IPC分类号： G01R1/067 ,  G01R31/20

CPC分类号： G01R1/06761

摘要： A contactor includes a contactor base material including a first material and a conductor film including a second material. The conductor film is formed only on a contact surface with an electrode of a semiconductor apparatus at a tip of the contactor film.

摘要翻译： 接触器包括包括第一材料和包括第二材料的导体膜的接触器基材。 导体膜仅在与接触器膜的尖端处的半导体装置的电极的接触表面上形成。

公开(公告)号：US08671557B2

公开(公告)日：2014-03-18

申请号：US13242647

申请日：2011-09-23

申请人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

发明人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

IPC分类号： B23P19/00

CPC分类号： B25B27/14 ,  H05K7/1061 ,  Y10T29/4913 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53187 ,  Y10T29/53191 ,  Y10T29/53943

摘要： A tray is provided in combination with an electronic component attaching tool attached to the tray and includes an attachment depression part that includes an inner wall and to which an electronic component is attached, wherein forming of the inner wall of the attachment depression part does not substantially depend on an external shape of the electronic component, and a standard part formed in the inner wall of the attachment depression part and engaging with a first structure part of the electronic component attaching tool to align a position of the electronic component attaching tool to the standard part when a position of the electronic component is aligned to a first position of the tray using the electronic component attaching tool, the standard part having a shape which does not substantially depend on the external shape of the electronic component.

摘要翻译： 托盘与附接到托盘上的电子部件连接工具组合地提供，并且包括附接凹陷部分，该附件凹陷部分包括内壁并且附接有电子部件，其中，附接凹陷部分的内壁的形成基本上不 取决于电子部件的外部形状，以及形成在安装凹部的内壁中的标准部分，并与电子部件安装工具的第一结构部分接合，以将电子部件安装工具的位置对准到标准 当使用电子部件安装工具将电子部件的位置与托盘的第一位置对准时，标准部件具有基本上不依赖于电子部件的外形的形状。

公开(公告)号：US08164181B2

公开(公告)日：2012-04-24

申请号：US12872131

申请日：2010-08-31

申请人： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

发明人： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

IPC分类号： H01L23/12

CPC分类号： H01L21/67333 ,  H01L21/50 ,  H01L22/20 ,  H01L23/04 ,  H01L23/544 ,  H01L25/0655 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/1616 ,  H01L2924/166 ,  Y10T29/49826 ,  H01L2924/00

摘要： A semiconductor device packaging structure is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.

摘要翻译： 公开了一种半导体器件封装结构，其可以提高半导体器件的性能测试的可靠性，并防止在运输或包装期间对半导体器件的损坏。 由于包含半导体芯片和具有不同高度的电气部件，所以具有高度不均匀性的半导体器件附着IC盖。 IC盖包括突出部分和基部。 在安装到半导体器件之后，突出部分位于半导体器件中的自由区域中，并且基底部分由与半导体芯片和半导体器件中的电气部件分离的突起支撑。 IC盖可拆卸地附接到半导体器件。

公开(公告)号：US20080203558A1

公开(公告)日：2008-08-28

申请号：US12081961

申请日：2008-04-24

申请人： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

发明人： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

IPC分类号： H01L23/12 ,  H01L21/00

CPC分类号： H01L21/67333 ,  H01L21/50 ,  H01L22/20 ,  H01L23/04 ,  H01L23/544 ,  H01L25/0655 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/1616 ,  H01L2924/166 ,  Y10T29/49826 ,  H01L2924/00

摘要： A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.

摘要翻译： 公开了一种用于保护半导体器件的方法，其可以提高半导体器件的性能测试的可靠性，并防止在运输或包装期间对半导体器件的损坏。 由于包含半导体芯片和具有不同高度的电气部件，所以具有高度不均匀性的半导体器件附着IC盖。 IC盖包括突出部分和基部。 在安装到半导体器件之后，突出部分位于半导体器件中的自由区域中，并且基底部分由与半导体芯片和半导体器件中的电气部件分离的突起支撑。 IC盖可拆卸地附接到半导体器件。

公开(公告)号：US07399990B2

公开(公告)日：2008-07-15

申请号：US11433396

申请日：2006-05-15

申请人： Shigeyuki Maruyama

发明人： Shigeyuki Maruyama

IPC分类号： H01L23/58 ,  H01L23/48

CPC分类号： H01L22/32 ,  G01R31/2831 ,  G01R31/2884 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14

摘要： A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.

公开(公告)号：US07267559B2

公开(公告)日：2007-09-11

申请号：US10141778

申请日：2002-05-10

申请人： Takafumi Hashitani ,  Shigeyuki Maruyama

发明人： Takafumi Hashitani ,  Shigeyuki Maruyama

IPC分类号： H01R4/58

CPC分类号： G01R1/06755 ,  G01R1/07314 ,  G01R1/07378 ,  G01R3/00

摘要： An anisotropic conductive sheet comprising an insulating base material and a plurality of conductive passages embedded at predetermined positions in the insulating base material, penetrating the insulating base material in the thickness direction. The conductive passage comprises a matrix consisting of non-silicone material or silicone material having rubber elasticity, the matrix material being filled into through-holes formed at a predetermined position in the base material and then hardened, and a conductive filler dispersed in the matrix at an amount capable of exhibiting conductivity at all times. A surface layer of conductive material is capable of functioning as a contact and ensuring an electrical connection by piercing a surface layer of an opponent when the surface layer is used as a contact, such as a layer of fine conductive particles is further provided on at least one of the end faces of the conductive passage. An anisotropic conductive sheet of the present invention can be advantageously used in an electronic device or inspection apparatus, used for an operation test, as a contactor.

摘要翻译： 一种各向异性导电片，其包括绝缘基材和嵌入绝缘基材中的预定位置的多个导电通道，其在厚度方向上穿透绝缘基材。 导电通道包括由非硅酮材料或具有橡胶弹性的硅酮材料构成的基体，将基质材料填充到形成在基材中的预定位置上的通孔中，然后硬化，并将分散在基体中的导电填料 能够始终显示导电性的量。 导电材料的表面层能够起到接触的作用，并且当表面层用作接触时，通过刺穿对方的表面层来确保电连接，例如至少进一步提供细导电颗粒层 导电通路的端面之一。 本发明的各向异性导电片可以有利地用于用作操作试验的电子装置或检查装置中作为接触器。

公开(公告)号：US20060097356A1

公开(公告)日：2006-05-11

申请号：US11062488

申请日：2005-02-23

申请人： Shigeru Fujii ,  Yoshikazu Arisaka ,  Hitoshi Izuru ,  Kazuhiro Tashiro ,  Shigeyuki Maruyama

发明人： Shigeru Fujii ,  Yoshikazu Arisaka ,  Hitoshi Izuru ,  Kazuhiro Tashiro ,  Shigeyuki Maruyama

IPC分类号： H01L23/544

CPC分类号： H01L21/78 ,  H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor substrate eliminates a restriction caused by a width of scribe lines so as to increase a number of semiconductor elements formed on the semiconductor substrate. A plurality of semiconductor element areas are formed by forming a plurality of unit exposed and printed areas, each of which contains the semiconductor element areas. A first scribe line extends between the semiconductor element areas formed within the unit exposed and printed area. A second scribe line extends between the unit exposed and printed areas. A width of the first scribe line is different from a width of the second scribe line.

摘要翻译： 半导体衬底消除了由划线的宽度引起的限制，从而增加形成在半导体衬底上的半导体元件的数量。 多个半导体元件区域通过形成多个单位曝光和印刷区域而形成，每个单元暴露和印刷区域都包含半导体元件区域。 第一刻划线在形成在单元曝光和印刷区域内的半导体元件区域之间延伸。 第二划线在单元曝光和打印区域之间延伸。 第一划线的宽度与第二划线的宽度不同。

公开(公告)号：US06937038B2

公开(公告)日：2005-08-30

申请号：US10373072

申请日：2003-02-26

申请人： Shigeyuki Maruyama ,  Susumu Kida ,  Naoyuki Watanabe ,  Takafumi Hashitani ,  Ei Yano ,  Ichiro Midorikawa

发明人： Shigeyuki Maruyama ,  Susumu Kida ,  Naoyuki Watanabe ,  Takafumi Hashitani ,  Ei Yano ,  Ichiro Midorikawa

IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  H01L21/66 ,  H01L23/498 ,  G01R31/02

CPC分类号： G01R1/06733 ,  G01R1/0483 ,  G01R1/06711 ,  G01R1/06755 ,  G01R1/07314 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A contactor is provided which contactor comprises an insulating substrate, a concave portion formed in the insulating substrate and extending in a perpendicular direction from a surface thereof, and elastic conductive particles disposed in the concave portion. A part of one of the conductive particles protrudes from the surface of the insulating substrate.