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公开(公告)号：US20090057799A1
公开(公告)日：2009-03-05
申请号：US12229651
申请日：2008-08-26
CPC分类号： H01L31/0203 , H01L31/02164 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/1815 , H01L2924/00014 , H01L2924/00
摘要： A sensor semiconductor device and a method for fabricating the same are provided. At least one sensor chip is mounted and electrically connected to a lead frame. A first and a second encapsulation molding processes are sequentially performed to form a transparent encapsulant for encapsulating the sensor chip and a part of the lead frame and to form a light-impervious encapsulant for encapsulating the transparent encapsulant. The transparent encapsulant has a light-pervious portion formed at a position corresponding to and above a sensor zone of the sensor chip. The light-pervious portion is exposed from the light-impervious encapsulant. Light may penetrate the light-pervious portion, without using an additional cover board, thereby reducing manufacturing steps and costs. The above arrangement avoids prior-art problems of poor reliability caused by a porous encapsulant and poor signal reception caused by interference of ambient light entering into a conventional chip only encapsulated by a transparent encapsulant.
摘要翻译： 提供一种传感器半导体器件及其制造方法。 至少一个传感器芯片被安装并电连接到引线框架。 依次执行第一和第二封装成型工艺以形成用于封装传感器芯片和引线框架的一部分的透明密封剂，并形成用于封装透明密封剂的不透光密封剂。 透明密封剂具有形成在对应于传感器芯片的传感器区域上方的位置处的透光部分。 透光部分从不透光的密封剂暴露出来。 光可以穿透透光部分，而不使用附加的盖板，从而减少制造步骤和成本。 上述布置避免了由多孔密封剂引起的可靠性差的现有技术问题，以及由仅通过透明密封剂封装的传统芯片的环境光的干扰引起的差信号接收。
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公开(公告)号：US20070164386A1
公开(公告)日：2007-07-19
申请号：US11648045
申请日：2006-12-28
IPC分类号： H01L31/0203 , H01L21/56
CPC分类号： H01L27/14687 , H01L24/97 , H01L27/14618 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2224/97 , H01L2924/01033 , H01L2924/15311 , H01L2924/16195 , H01L2224/85 , H01L2924/00014
摘要： A semiconductor device and the fabrication method thereof are provided. The fabrication method includes providing a substrate module plate having a plurality of substrates; attaching at least one sensor chip to each of the substrates of the substrate module plate; electrically connecting each of the sensor chips to each of the substrates through bonding wires; forming an insulating layer between each sensor chip on the substrate module plate, wherein the height of the insulating layers are not greater than the thickness of the sensor chips so as to prevent flash from the insulating layers from contaminating the sensor chips; forming an adhesive lip on the insulating layer or forming a second insulating layer followed by forming the adhesive layer, wherein the adhesive layer or the second insulating layer is higher than the highest loop-height of the bonding wires; adhering a light transmitting cover to each adhesive layer to cover the sensor chip; and cutting the substrate module plate to separate the substrates to form a plurality of semiconductor devices each integrated with at least one sensor chip. As the adhesive layers are not in contact with the bonding wires, the problems of damaging or breaking the bonding wires can be prevented in the process of adhering the light transmitting cover.
摘要翻译： 提供半导体器件及其制造方法。 该制造方法包括提供具有多个基板的基板模块板; 将至少一个传感器芯片附接到所述基板模块板的每个基板; 通过接合线将每个传感器芯片电连接到每个基板; 在衬底模块板上的每个传感器芯片之间形成绝缘层，其中绝缘层的高度不大于传感器芯片的厚度，以防止来自绝缘层的闪光污染传感器芯片; 在所述绝缘层上形成粘合剂唇缘或形成第二绝缘层，接着形成所述粘合剂层，其中所述粘合剂层或所述第二绝缘层高于所述接合线的最高环高度; 将透光盖粘附到每个粘合剂层以覆盖传感器芯片; 以及切割所述基板模块板以分离所述基板以形成多个半导体器件，每个半导体器件与至少一个传感器芯片集成。 由于粘合层不与接合线接触，所以在粘接透光罩的过程中可以防止损坏或断裂接合线的问题。
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33.发明申请Method for fabricating semiconductor package having conductive bumps on chip 有权用于制造在芯片上具有导电凸块的半导体封装的方法公开(公告)号：US20060118944A1
公开(公告)日：2006-06-08
申请号：US11338056
申请日：2006-01-23
申请人： Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L23/053
CPC分类号： H01L21/561 , H01L21/568 , H01L23/3121 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/20 , H01L2224/97 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/18162 , H01L2924/351 , H01L2224/82 , H01L2924/00
摘要： A semiconductor package having conductive bumps on a chip and a fabrication method thereof are provided. A plurality of the conductive bumps are deposited respectively on bond pads of the chip. An encapsulation body encapsulates the chip and conductive bumps while exposing ends of the conductive bumps. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the exposed ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with openings for exposing predetermined portions of the conductive traces. The exposed portions of the conductive traces are connected to a plurality of solder balls respectively. The conductive bumps on the bond pads of the chip allow easy positional recognition of the bond pads, making the conductive traces well electrically connected to the bond pads through the conductive bumps and assuring the quality and reliability of the semiconductor package.
摘要翻译： 提供了一种在芯片上具有导电凸块的半导体封装及其制造方法。 多个导电凸块分别沉积在芯片的接合焊盘上。 封装体封装芯片和导电凸块，同时暴露导电凸块的端部。 多个导电迹线形成在封装主体上并与导电凸块的暴露端电连接。 焊接掩模层施加在导电迹线上并形成有用于暴露导电迹线的预定部分的开口。 导电迹线的暴露部分分别连接到多个焊球。 芯片的接合焊盘上的导电凸块允许接合焊盘的容易的位置识别，使得导电迹线通过导电凸块良好地电连接到接合焊盘，并确保半导体封装的质量和可靠性。
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公开(公告)号：US20080303111A1
公开(公告)日：2008-12-11
申请号：US12156901
申请日：2008-06-05
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L23/24 , H01L31/18 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： The invention discloses a sensor package and a method for fabricating the same. The sensor package includes: a substrate with an opening; a sensor chip disposed in the opening and electrically connected to the substrate; an encapsulant filling spacing between the sensor chip and the opening so as to secure the sensor chip to the substrate; and a transparent cover attached to the substrate via an adhesive layer, wherein the adhesive layer covers the sensor chip and bonding wires and is formed with an opening for exposing sensor region of the sensor chip. Securing the sensor chip in the opening of the substrate reduces the height of the sensor package, and meanwhile the process cost is reduced by eliminating the need of formation of conductive bumps on the sensor chip or the transparent cover and eliminating the need of specially designed substrate.
摘要翻译： 本发明公开了一种传感器封装及其制造方法。 传感器封装包括：具有开口的基板; 传感器芯片，其布置在所述开口中并电连接到所述基板; 传感器芯片和开口之间的密封剂填充间隔，以将传感器芯片固定到基板上; 以及通过粘合剂层附着到基板的透明盖，其中粘合剂层覆盖传感器芯片和接合线，并且形成有用于暴露传感器芯片的传感器区域的开口。 将传感器芯片固定在基板的开口中，降低传感器封装的高度，同时通过消除在传感器芯片或透明盖上形成导电凸块的需要降低工艺成本，并且不需要特别设计的基板 。
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公开(公告)号：US20080258306A1
公开(公告)日：2008-10-23
申请号：US12105538
申请日：2008-04-18
IPC分类号： H01L23/538 , H01L21/56
CPC分类号： H01L23/3114 , H01L21/6835 , H01L23/3135 , H01L23/3185 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02371 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/12105 , H01L2224/16145 , H01L2224/48091 , H01L2224/82001 , H01L2224/97 , H01L2225/06562 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2224/82 , H01L2924/01028 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention provides a semiconductor device and a method for fabricating the same. The semiconductor device includes a chip having an active surface and an opposing non-active surface, wherein a plurality of bond pads are formed on the active surface, and first metal layers are formed on the bond pads and to edges of the non-active surface; conductive traces disposed on the non-active surface of the chip; a dielectric layer covering sides of the chip and formed with a plurality of openings therein to expose a portion of the conductive traces; and a plurality of second metal layers formed in the openings of the dielectric layer and on the first metal layers, such that the bond pads are electrically connected to the conductive traces via the first and second metal layers.
摘要翻译： 本发明提供一种半导体器件及其制造方法。 半导体器件包括具有活性表面和相对的非活性表面的芯片，其中在有源表面上形成多个接合焊盘，并且第一金属层形成在接合焊盘和非活性表面的边缘上 ; 布置在芯片的非有源表面上的导电迹线; 介电层，其覆盖所述芯片的侧面并在其中形成有多个开口以暴露所述导电迹线的一部分; 以及多个第二金属层，形成在电介质层的开口中和第一金属层上，使得接合焊盘经由第一和第二金属层电连接到导电迹线。
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公开(公告)号：US20080251937A1
公开(公告)日：2008-10-16
申请号：US12082724
申请日：2008-04-11
CPC分类号： H01L21/76898 , H01L25/0657 , H01L2224/48091 , H01L2225/06513 , H01L2225/06551 , H01L2225/06562 , H01L2924/00014
摘要： A stackable semiconductor device and a manufacturing method thereof are disclosed. The method includes providing a wafer comprised of a plurality of chips, wherein a plurality of solder pads are formed on the active surface of each chip, and a plurality of grooves are formed between the solder pads of any two adjacent ones of the chips; forming a dielectric layer on regions between the solder pads of any two adjacent ones of the chips ; forming a metal layer on the dielectric layer electrically connected to the solder pads and forming a connective layer on the metal layer, wherein the width of the connective layer is smaller than that of the metal layer; cutting along the grooves to break off the electrical connection between adjacent chips; thinning the non-active surface of the wafer to the extent that the metal layer is exposed from the wafer; and separating the chips to form a plurality of stackable semiconductor devices. Accordingly, a multi-chip stack structure can be obtained by stacking and electrically connecting a plurality of semiconductor devices through the electrical connection between the connective layer of a semiconductor device and the metal layer of another semiconductor device, thereby effectively integrating more chips without having to increase the stacking area, and further the problems of poor electrical connection, complicated manufacturing processes and high costs known in the prior art can be avoided.
摘要翻译： 公开了一种可堆叠半导体器件及其制造方法。 该方法包括提供由多个芯片组成的晶片，其中在每个芯片的有源表面上形成多个焊盘，并且在任何两个相邻芯片的焊盘之间形成多个沟槽; 在任何两个相邻芯片的焊盘之间的区域上形成电介质层; 在与所述焊料焊盘电连接的所述电介质层上形成金属层，并在所述金属层上形成连接层，其中所述连接层的宽度小于所述金属层的宽度; 沿着凹槽切割以破坏相邻芯片之间的电连接; 使晶片的非活性表面变薄至金属层从晶片露出的程度; 并分离所述芯片以形成多个可堆叠半导体器件。 因此，通过半导体器件的连接层与另一半导体器件的金属层之间的电连接层叠并电连接多个半导体器件，可以获得多芯片堆叠结构，从而有效地集成更多的芯片，而不必 增加堆积面积，进一步避免了现有技术中已知的电连接不良，制造工艺复杂，成本高的问题。
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公开(公告)号：US20080197438A1
公开(公告)日：2008-08-21
申请号：US12070003
申请日：2008-02-14
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L21/78 , H01L27/14618 , H01L27/14687 , H01L2224/94
摘要： This invention discloses a sensor semiconductor device and a manufacturing method thereof, including: providing a wafer having a plurality of sensor chips, forming a plurality of grooves between bond pads on active surfaces of the adjacent sensor chips; forming conductive traces in the grooves for electrically connecting the bond pads; mounting a transparent medium on the wafer for covering sensing areas of the sensor chips; thinning the sensor chips from the non-active surfaces down to the grooves, thereby exposing the conductive traces; cutting the wafer to separate the sensor chips; mounting the sensor chips on a substrate module having a plurality of substrates, electrically connecting the conductive traces to the substrates; providing an insulation material on the substrate module and between the sensor chips so as to encapsulate the sensor chips but expose the transparent medium; and cutting the substrate module to separate a plurality of resultant sensor semiconductor devices.
摘要翻译： 本发明公开了一种传感器半导体器件及其制造方法，包括：提供具有多个传感器芯片的晶片，在相邻传感器芯片的有源表面上的接合焊盘之间形成多个沟槽; 在沟槽中形成导电迹线以电连接接合焊盘; 在所述晶片上安装透明介质以覆盖所述传感器芯片的感测区域; 将传感器芯片从非活性表面减薄到凹槽，从而暴露导电迹线; 切割晶片以分离传感器芯片; 将传感器芯片安装在具有多个基板的基板模块上，将导电迹线电连接到基板; 在衬底模块上和传感器芯片之间提供绝缘材料，以封装传感器芯片，但暴露透明介质; 以及切割所述基板模块以分离多个所得传感器半导体器件。
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公开(公告)号：US20080090336A1
公开(公告)日：2008-04-17
申请号：US11954355
申请日：2007-12-12
申请人： Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L21/56
CPC分类号： H01L24/97 , H01L23/3128 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L2224/16 , H01L2224/16225 , H01L2224/16245 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/73253 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/05599 , H01L2224/0401
摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; an encapsulant formed on the chip carrier and for encapsulating the chip, with a non-active surface of the chip being exposed from the encapsulant; and a heat spreader having a hollow portion and attached to the encapsulant, wherein the chip is received in the hollow portion and the non-active surface of the chip is completely exposed to the hollow portion, such that heat generated by the chip can be directly dissipated out of the package structure. The present invention also provides a method for fabricating the heat dissipating package structure.
摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 形成在所述芯片载体上并用于封装所述芯片的密封剂，所述芯片的非活性表面从所述密封剂暴露出来; 以及具有中空部分并附着到密封剂的散热器，其中芯片被容纳在中空部分中，并且芯片的非活动表面完全暴露于中空部分，使得芯片产生的热量可以直接 从包装结构中消散掉。 本发明还提供一种制造散热封装结构的方法。
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公开(公告)号：US20080079105A1
公开(公告)日：2008-04-03
申请号：US11904648
申请日：2007-09-27
IPC分类号： H01L31/0203 , H01L21/02
CPC分类号： H01L27/14618 , H01L24/97 , H01L27/14683 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/01005 , H01L2924/01033 , H01L2924/01082 , H01L2924/15311 , H01L2924/16195 , H01L2224/85 , H01L2924/00014
摘要： A sensor-type package and a fabrication method thereof are provided. A sensor-type chip is mounted on a substrate and is electrically connected to the substrate via bonding wires. A light-pervious body is attached to the sensor-type chip, and has one surface covered with a covering layer and another surface formed with an adhesive layer. An encapsulant encapsulates the light-pervious body. As an adhesive force between the covering layer and the encapsulant is greater than that between the covering layer and the light-pervious body, the covering layer and a portion of the encapsulant located on the covering layer can be concurrently removed, such that the light-pervious body is exposed and light can pass through the light-pervious body to be captured by the sensor-type chip. The above arrangement eliminates the need of using a dam structure as in the prior art and provides a compact sensor-type package with improved fabrication reliability.
摘要翻译： 提供了传感器型封装及其制造方法。 传感器型芯片安装在基板上，并通过接合线与基板电连接。 透光体附着在传感器型芯片上，其一个表面被覆盖层和形成有粘合剂层的另一表面覆盖。 密封剂封装透光体。 由于覆盖层和密封剂之间的粘合力大于覆盖层和透光体之间的粘合力，所以可以同时去除位于覆盖层上的覆盖层和密封剂的一部分， 透光体被曝光，光可以通过透光体，由传感器型芯片捕获。 上述布置消除了如现有技术中使用坝结构的需要，并且提供了具有改进的制造可靠性的紧凑型传感器型封装。
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40.发明申请Method for fabricating wafer level semiconductor package with build-up layer 有权用于制造具有堆积层的晶片级半导体封装的方法公开(公告)号：US20070034998A1
公开(公告)日：2007-02-15
申请号：US11580560
申请日：2006-10-12
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。
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