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公开(公告)号：US20190007088A1
公开(公告)日：2019-01-03
申请号：US15900594
申请日：2018-02-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Feng-Wei KUO , Chewn-Pu JOU , Huan-Neng Chen , Lan-Chou Cho , Robert Bogdan STASZEWSKI , Sandro Binsfeld FERREIRA
Abstract: An ultra-low-power receiver includes a low-noise amplifier configured to receive an input analog signal and generate an amplified signal and a mixer electrically coupled to the low-noise amplifier. The mixer is configured to convert said amplified signal into an intermediate frequency signal. A progressively reduced intermediate frequency filter is configured to process the intermediate frequency signal from the mixer in discrete time.
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公开(公告)号：US20180027648A1
公开(公告)日：2018-01-25
申请号：US15723099
申请日：2017-10-02
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Jiun-Yi WU , Chien-Hsun LEE , Chewn-Pu JOU , Fu-Lung HSUEH
IPC: H05K1/02 , H05K3/42 , H05K3/40 , H01L23/498 , H01L21/48 , H01L23/552 , H05K1/11 , H05K3/00
Abstract: A method for manufacturing an interconnect structure is provided. The method includes the following steps. An opening is through a substrate. A low-k dielectric block is formed in the opening. At least one first via is formed through the low-k dielectric block. A first conductor is formed in the first via.
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公开(公告)号：US20170373056A1
公开(公告)日：2017-12-28
申请号：US15701218
申请日：2017-09-11
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chewn-Pu JOU , Tien-I BAO
IPC: H01L27/06 , H01L21/02 , H01L23/528 , H01L49/02 , H01L21/311 , H01L23/522
CPC classification number: H01L27/0629 , H01L21/02148 , H01L21/02159 , H01L21/0217 , H01L21/02175 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02271 , H01L21/31111 , H01L23/5226 , H01L23/528 , H01L28/60
Abstract: A vertical metal-insulator-metal (MIM) capacitor is formed within multiple layers of a multi-level metal interconnect system of a chip. The vertical MIM capacitor has a first electrode, a second electrode, and a high-k capacitor dielectric material disposed therebetween. The dielectric constant of the capacitor dielectric material is greater than the dielectric constant of interlayer dielectric (ILD) material. After ILD is removed from between the vertically-oriented, interdigitated portions of the first and second electrodes, a capacitor dielectric material having a dielectric constant greater than the MD dielectric material is disposed therebetween.
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公开(公告)号：US20170294697A1
公开(公告)日：2017-10-12
申请号：US15633552
申请日：2017-06-26
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chewn-Pu JOU , Wen-Shiang LIAO
CPC classification number: H01P3/16 , G02B6/122 , G02B6/1228 , G02B6/132 , G02B6/4274 , G02B6/4298 , G02F1/011 , G02F1/025
Abstract: A semiconductor structure includes a dielectric waveguide, a driver die, a first transmission electrode, a second transmission electrode, and a receiver die. The driver die is configured to generate a driving signal. The first transmission electrode is located along a first side of the dielectric waveguide and configured to receive the driving signal. The second transmission electrode is located along a second side of the dielectric waveguide and electrically coupled to a transmission ground. The first transmission electrode and the second transmission electrode are mirror images. The receiver die is configured to receive a received signal from the dielectric waveguide.
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35.发明申请公开(公告)号：US20170278806A1
公开(公告)日：2017-09-28
申请号：US15076976
申请日：2016-03-22
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Feng Wei KUO , Wen-Shiang LIAO , Chewn-Pu JOU , Huan-Neng CHEN , Lan-Chou CHO , William Wu SHEN
IPC: H01L23/66 , H01L25/18 , H01L23/00 , H01L25/065 , H01L23/552 , H01L23/498
CPC classification number: H01L23/66 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/49838 , H01L23/5225 , H01L23/552 , H01L24/17 , H01L25/0655 , H01L25/18 , H01L2223/6622 , H01L2223/6638 , H01L2224/16225 , H01L2924/141 , H01L2924/1421 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/1443 , H01L2924/146 , H01L2924/3025
Abstract: A semiconductor package includes a first semiconductor device, a second semiconductor device vertically positioned above the first semiconductor device, and a ground shielded transmission path. The ground shielded transmission path couples the first semiconductor device to the second semiconductor device. The ground shielded transmission path includes a first signal path extending longitudinally between a first end and a second end. The first signal path includes a conductive material. A first insulating layer is disposed over the signal path longitudinally between the first end and the second end. The first insulating layer includes an electrically insulating material. A ground shielding layer is disposed over the insulating material longitudinally between the first end and the second end of the signal path. The ground shielding layer includes a conductive material coupled to ground. The ground shielding layer drives radiation signals received therein to ground to prevent induced noise in the first signal path.
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Patent Agency Ranking
公开(公告)号：US20170231083A1
公开(公告)日：2017-08-10
申请号：US15016147
申请日：2016-02-04
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Jiun-Yi WU , Chien-Hsun LEE , Chewn-Pu JOU , Fu-Lung HSUEH
IPC: H05K1/02 , H01L23/498 , H05K1/11 , H05K3/00 , H05K3/42 , H05K3/40 , H01L21/48 , H01L23/552
CPC classification number: H05K1/0216 , H01L21/485 , H01L21/486 , H01L23/49827 , H01L23/552 , H05K1/024 , H05K1/0245 , H05K1/113 , H05K1/115 , H05K3/0047 , H05K3/4007 , H05K3/42 , H05K3/423 , H05K2201/0723 , H05K2201/09545 , H05K2201/0959 , H05K2201/09645
Abstract: A method for manufacturing an interconnect structure and an interconnect structure are provided. The method includes: forming an opening in a substrate; forming a low-k dielectric block in the opening; forming at least one via in the low-k dielectric block; and forming a conductor in the via. The interconnect structure includes a substrate, a dielectric block, and a conductor. The substrate has an opening therein. The dielectric block is present in the opening of the substrate. The dielectric block has at least one via therein. The dielectric block has a dielectric constant smaller than that of the substrate. The conductor is present in the via of the dielectric block.
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公开(公告)号：US20160308520A1
公开(公告)日：2016-10-20
申请号：US14689096
申请日：2015-04-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Lan-Chou CHO , Chewn-Pu JOU , Feng Wei KUO , Huan-Neng CHEN
IPC: H03K5/1534 , H03K5/13 , H03K5/24 , H03K5/135
CPC classification number: G04F10/005 , H03K5/131 , H03K5/135 , H03K5/1534 , H03K5/24 , H03K2005/00058 , H03K2005/00071
Abstract: A circuit includes a time delta detector configured to receive an input clock signal and a reference clock signal and generate a delta pulse signal and a reference pulse signal. A comparison circuit is configured to receive the delta pulse signal and the reference pulse signal. The comparison circuit generates an output indicative of a bit of a time difference between the input clock signal and the reference clock signal. A control circuit is configured to receive the output from the comparison circuit. The control circuit maintains a count of the time difference between the input clock signal and the reference clock signal.
Abstract translation: 一种电路包括时间差检测器，其被配置为接收输入时钟信号和参考时钟信号，并产生增量脉冲信号和参考脉冲信号。 比较电路被配置为接收增量脉冲信号和参考脉冲信号。 比较电路产生表示输入时钟信号和参考时钟信号之间的时间差的位的输出。 控制电路被配置为接收来自比较电路的输出。 控制电路维持输入时钟信号和参考时钟信号之间的时间差的计数。
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公开(公告)号：US20160147088A1
公开(公告)日：2016-05-26
申请号：US15010816
申请日：2016-01-29
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chewn-Pu JOU , Wen-Shiang LIAO
CPC classification number: H01P3/16 , G02B6/122 , G02B6/1228 , G02B6/132 , G02B6/4274 , G02B6/4298 , G02F1/011 , G02F1/025
Abstract: A semiconductor structure and a method are disclosed herein. The semiconductor structure includes a dielectric waveguide vertically disposed between a first layer and a second layer, a driver die configured to generate, at a first output node, a driving signal, a first transmission electrode located along a first side of the dielectric waveguide and configured to receive the driving signal from the first output node, a first receiver electrode located along the first side of the dielectric waveguide, and a receiver die configured to receive a received signal from the first receiver electrode.
Abstract translation: 本文公开了半导体结构和方法。 半导体结构包括垂直设置在第一层和第二层之间的电介质波导，驱动管芯，被配置为在第一输出节点处产生驱动信号，沿着电介质波导的第一侧定位的第一传输电极， 接收来自第一输出节点的驱动信号，沿着电介质波导的第一侧定位的第一接收器电极和被配置为从第一接收器电极接收接收信号的接收器管芯。
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公开(公告)号：US20240393536A1
公开(公告)日：2024-11-28
申请号：US18791313
申请日：2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Cheng-Tse TANG , Chewn-Pu JOU , Chia-Ju YU , CHENG HSIAO
Abstract: The present disclosure relates to optical waveguide termination devices. In some embodiments, an optical waveguide termination device is coupled to an end of an optical waveguide. The optical waveguide termination device is a tapered structure. In various embodiments, an optical absorption rate of the tapered structure is increased to enhance a termination efficiency. The optical absorption is increased by highly-doped material, multi-layer structure, different cladding, and periodic structure. The enhancement of the termination efficiency benefits size reduction of the tapered structure.
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公开(公告)号：US20240385374A1
公开(公告)日：2024-11-21
申请号：US18787982
申请日：2024-07-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Cheng-Tse TANG , Chewn-Pu JOU
Abstract: A device includes an optical isolator disposed between adjacent optical waveguides along a direction. The optical isolator has vertical or horizontal dimensions that are different than at least one of the optical waveguides. The vertical and horizontal dimensions are greater than vertical and horizontal dimensions of at least one of the waveguides. In various embodiments, the structure of the optical isolator can be a planar structure, a columnar periodic structure, or a grating structure. The material of the optical isolator can be a metallic material or a dielectric material. In some embodiments, the optical isolator and the optical waveguides are used to enhance the performance of an optical multiplexing device.
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