公开(公告)号：US20210098325A1

公开(公告)日：2021-04-01

申请号：US16746976

申请日：2020-01-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yang Yu ,  Chien-Hsun Lee ,  Jung-Wei Cheng ,  Tsung-Ding Wang ,  Yu-Min Liang

IPC: H01L23/31 ,  H01L23/522

Abstract: A semiconductor package including a first semiconductor device, a second semiconductor device, an insulating encapsulant, a redistribution structure and a supporting element is provided. The insulating encapsulant encapsulates the first semiconductor device and the second semiconductor device. The redistribution structure is over the first semiconductor device, the second semiconductor device and the insulating encapsulant. The redistribution structure is electrically connected to the first semiconductor device and the second semiconductor device. The supporting element is embedded in one of the insulating encapsulant and the redistribution structure.

公开(公告)号：US20210057331A1

公开(公告)日：2021-02-25

申请号：US16547583

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hao-Cheng Hou ,  Chien-Hsun Lee ,  Chung-Shi Liu ,  Jung-Wei Cheng ,  Tsung-Ding Wang

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a semiconductor die encapsulated by an insulating encapsulation, a redistribution circuit structure disposed over the semiconductor die and the insulating encapsulation, the redistribution circuit structure being electrically connected to the semiconductor die; and a conductive feature having a first portion embedded in the redistribution circuit structure and a second portion connected to the first portion, the first portion having a first long axis and a first short axis perpendicular to the long axis in a top view, the second portion disposed over and electrically connected to the first portion. A semiconductor device having the semiconductor package, a circuit substrate and a circuit board is also provided.

公开(公告)号：US20210050332A1

公开(公告)日：2021-02-18

申请号：US17087106

申请日：2020-11-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsun Lee ,  Tsung-Ding Wang ,  Mirng-Ji Lii ,  Chen-Hua Yu

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L21/78 ,  H01L25/18 ,  H01L25/00

Abstract: A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.

公开(公告)号：US20210028147A1

公开(公告)日：2021-01-28

申请号：US17068389

申请日：2020-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Kuo-Chung Yee ,  Tsung-Ding Wang ,  Chien-Hsun Lee

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L21/768 ,  H01L23/31 ,  H01L23/367 ,  H01L23/522 ,  H01L25/18 ,  H01L21/48

Abstract: A semiconductor device and a method of making the same are provided. A first die and a second die are placed over a carrier substrate. A first molding material is formed adjacent to the first die and the second die. A first redistribution layer is formed overlying the first molding material. A through via is formed over the first redistribution layer. A package component is on the first redistribution layer next to the copper pillar. The package component includes a second redistribution layer. The package component is positioned so that it overlies both the first die and the second die in part. A second molding material is formed adjacent to the package component and the first copper pillar. A third redistribution layer is formed overlying the second molding material. The second redistribution layer is placed on a substrate and bonded to the substrate.

公开(公告)号：US10515931B2

公开(公告)日：2019-12-24

申请号：US14055928

申请日：2013-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Ding Wang ,  Chien-Hsun Lee

IPC: H01L23/48 ,  H01L23/52 ,  H01L25/065 ,  H01L23/00

Abstract: An assembly has at least one integrated circuit (IC) die fixed in a medium. The assembly has a redistribution layer over the IC die. The redistribution layer has conductors connecting first pads on active faces of the IC die to second pads at an exposed surface of the assembly. A die unit is provided over the IC die. The die unit has a bottom die interconnected to a package substrate. Respective portions of the redistribution layer corresponding to each of the at least one IC die partially underlie the bottom die, and extend beyond the bottom die. The package substrate has contacts connected to the ones of the second pads corresponding to the at least one IC die.

公开(公告)号：US20180012860A1

公开(公告)日：2018-01-11

申请号：US15712680

申请日：2017-09-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Jen Lin ,  Tsung-Ding Wang ,  Chien-Hsiun Lee ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/31 ,  H01L21/56 ,  H01L23/525

CPC classification number: H01L24/81 ,  H01L21/563 ,  H01L21/565 ,  H01L21/566 ,  H01L21/768 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/02311 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0347 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/21 ,  H01L2224/27318 ,  H01L2224/27334 ,  H01L2224/27416 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01047 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/2076 ,  H01L2224/81 ,  H01L2924/01029 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00

Abstract: In some embodiments, the present disclosure relates to a package assembly having a bump on a first substrate. A molding compound is on the first substrate and contacts sidewalls of the bump. A no-flow underfill layer is on a conductive region of a second substrate. The no-flow underfill layer and the conductive region contact the bump. A mask layer is arranged on the second substrate and laterally surrounds the no-flow underfill layer. The no-flow underfill layer contacts the substrate between the conductive region and the mask layer.