公开(公告)号：US20070222552A1

公开(公告)日：2007-09-27

申请号：US11488608

申请日：2006-07-19

申请人： Ying-Jiunn Lai ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Uei-Ming Jow ,  Chang-Lin Wei

发明人： Ying-Jiunn Lai ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Uei-Ming Jow ,  Chang-Lin Wei

IPC分类号： H01C1/012

CPC分类号： H01C17/23 ,  H01C7/003 ,  H05K1/167 ,  H05K3/0047 ,  H05K2203/171 ,  H05K2203/175

摘要： An adjustable resistor embedded in a multi-layered substrate and method for forming the same. The adjustable resistor comprises: a planar resistor, having a plurality of terminals; and a plurality of connecting lines connected to the planar resistor, each of the connecting lines being drawn from each of the terminals of the planar resistor so as to form a resistor network, wherein the connecting lines are selectively broken by a process for drilling the substrate to form a number of combinations of opened connecting lines such that the resistance value of the adjustable resistor is varied and thus the resistance value of the adjustable resistor can be precisely adjusted.

摘要翻译： 嵌入多层基板中的可调电阻及其形成方法。 可调电阻器包括：具有多个端子的平面电阻器; 以及连接到平面电阻器的多个连接线，每个连接线从平面电阻器的每个端子拉出以形成电阻器网络，其中通过用于钻取基板的工艺来选择性地断开连接线 以形成打开的连接线的多个组合，使得可调节电阻器的电阻值变化，从而可以精确地调节可调电阻器的电阻值。

公开(公告)号：US20070164396A1

公开(公告)日：2007-07-19

申请号：US11646339

申请日：2006-12-28

申请人： Uei-Ming Jow ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Ying-Jiunn Lai

发明人： Uei-Ming Jow ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Ying-Jiunn Lai

IPC分类号： H01L29/00

CPC分类号： H01L23/14 ,  H01F17/0006 ,  H01F41/046 ,  H01F2017/0066 ,  H01G4/30 ,  H01G4/40 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49894 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/086 ,  H05K2201/09672 ,  H01L2924/00

摘要： A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

摘要翻译： 提供了多功能复合基板结构。 具有高介电常数的第一衬底和具有低介电常数和低损耗角正切的第二衬底交错在第三衬底之上。 一个或多个导磁块可以形成在每个衬底之上，使得可以在其上制造一个或多个电感器。 可以在第一基板上制造一个或多个电容器。 此外，系统阻抗的一个或多个信号传输迹线形成在外层的第二基板上。 因此，有效地提高了电感器的电感。 此外，内置组件的面积减少。 此外，它具有更短的延迟时间，更小的介电损耗和更高的传输高速和高频信号的回波损耗。

公开(公告)号：US20070132526A1

公开(公告)日：2007-06-14

申请号：US11633545

申请日：2006-12-05

申请人： Chang-Lin Wei ,  Chang-Sheng Chen ,  Syun Yu ,  Ying-Jiunn Lai ,  Uei-Ming Jow

发明人： Chang-Lin Wei ,  Chang-Sheng Chen ,  Syun Yu ,  Ying-Jiunn Lai ,  Uei-Ming Jow

IPC分类号： H01P5/10

CPC分类号： H01P5/10

摘要： A balanced-to-unbalanced transformer embedded with a filter, the balanced-to-unbalanced transformer being disposed in a multi-layered substrate and comprising vertically coupled transmission lines designed in different layers in the multi-layer substrate to increase transmission performances. A capacitor and a transmission line are connected to a single-ended I/O port of the balanced-to-unbalanced transformer such that a filter is embedded in the balanced-to-unbalanced transformer.

摘要翻译： 一种嵌入滤波器的平衡不平衡变压器，平衡不平衡变压器设置在多层衬底中，并且包括在多层衬底中以不同层设计的垂直耦合传输线，以增加传输性能。 电容器和传输线连接到平衡不平衡变压器的单端I / O端口，使得滤波器嵌入在平衡不平衡变压器中。

公开(公告)号：US20060158280A1

公开(公告)日：2006-07-20

申请号：US11246112

申请日：2005-10-11

申请人： Uei-Ming Jow ,  Ching-Liang Weng ,  Ying-Jiunn Lai ,  Chang-Sheng Chen

发明人： Uei-Ming Jow ,  Ching-Liang Weng ,  Ying-Jiunn Lai ,  Chang-Sheng Chen

IPC分类号： H03H7/38

CPC分类号： H05K1/0251 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01P5/02 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/115 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09454 ,  H05K2201/09618 ,  H05K2201/09627 ,  H05K2201/09809 ,  H05K2201/09845 ,  H01L2924/00

摘要： A high frequency and wide band impedance matching via is provided. As an application to multi-layer printed circuit boards, for example, the multi-layer circuit board has several signal transmission traces, several ground layers, signal transmission vias and ground vias. The signal transmission traces and the ground layers are sited on different circuit layers, and each signal transmission trace is opposite to one of the ground layers. The signal transmission vias are connected between the signal transmission traces. The ground vias are connected between the ground layers. The ground vias are opposite to the signal transmission vias, and the ground vias corresponding to the signal transmission vias are sited to stabilize the characteristic impedance of the transmission traces.

摘要翻译： 提供了高频和宽带阻抗匹配通孔。 作为多层印刷电路板的应用，例如，多层电路板具有多个信号传输轨迹，多个接地层，信号传输通孔和接地通孔。 信号传输轨迹和接地层位于不同的电路层上，每个信号传输轨迹与一个接地层相反。 信号传输通孔连接在信号传输轨迹之间。 接地通孔连接在接地层之间。 接地通孔与信号传输通道相对，并且对应于信号传输通孔的接地通孔被选择以稳定传输迹线的特性阻抗。

公开(公告)号：US20050104191A1

公开(公告)日：2005-05-19

申请号：US10713804

申请日：2003-11-14

申请人： Uei-Ming Jow ,  Pei-Shen Wei ,  Ching-Liang Weng ,  Chun-Kun Wu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

发明人： Uei-Ming Jow ,  Pei-Shen Wei ,  Ching-Liang Weng ,  Chun-Kun Wu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

IPC分类号： H01L21/4763 ,  H01L23/053 ,  H01L23/48 ,  H05K1/02 ,  H05K1/16 ,  H05K3/46

CPC分类号： H05K1/162 ,  H05K1/0218 ,  H05K1/0219 ,  H05K3/4602 ,  H05K2201/0723 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09672

摘要： An embedded microelectronic capacitor incorporating at least one ground shielding layer is provided which includes an upper ground shielding layer that has an aperture therethrough; an electrode plate positioned spaced-apart from the upper ground shielding layer that has a via extending upwardly away from the electrode plate through the aperture in the upper ground shielding layer providing electrical communication to the electrode plate without shorting to the upper ground shielding layer; a middle ground shielding layer positioned in the same plane of the electrode plate, surrounding while spaced-apart from the electrode plate at a predetermined distance; a lower ground shielding layer positioned spaced-apart from the electrode plate in an opposing relationship to the upper ground shielding layer; and a dielectric material embedding the upper ground shielding layer; the middle ground shielding layer and the lower ground shielding layer.